1*4882a593Smuzhiyun* Freescale IMX35 IOMUX Controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunPlease refer to fsl,imx-pinctrl.txt in this directory for common binding part 4*4882a593Smuzhiyunand usage. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun- compatible: "fsl,imx35-iomuxc" 8*4882a593Smuzhiyun- fsl,pins: two integers array, represents a group of pins mux and config 9*4882a593Smuzhiyun setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a 10*4882a593Smuzhiyun pin working on a specific function, CONFIG is the pad setting value like 11*4882a593Smuzhiyun pull-up for this pin. Please refer to imx35 datasheet for the valid pad 12*4882a593Smuzhiyun config settings. 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunCONFIG bits definition: 15*4882a593SmuzhiyunPAD_CTL_DRIVE_VOLAGAGE_18 (1 << 13) 16*4882a593SmuzhiyunPAD_CTL_DRIVE_VOLAGAGE_33 (0 << 13) 17*4882a593SmuzhiyunPAD_CTL_HYS (1 << 8) 18*4882a593SmuzhiyunPAD_CTL_PKE (1 << 7) 19*4882a593SmuzhiyunPAD_CTL_PUE (1 << 6) 20*4882a593SmuzhiyunPAD_CTL_PUS_100K_DOWN (0 << 4) 21*4882a593SmuzhiyunPAD_CTL_PUS_47K_UP (1 << 4) 22*4882a593SmuzhiyunPAD_CTL_PUS_100K_UP (2 << 4) 23*4882a593SmuzhiyunPAD_CTL_PUS_22K_UP (3 << 4) 24*4882a593SmuzhiyunPAD_CTL_ODE_CMOS (0 << 3) 25*4882a593SmuzhiyunPAD_CTL_ODE_OPENDRAIN (1 << 3) 26*4882a593SmuzhiyunPAD_CTL_DSE_NOMINAL (0 << 1) 27*4882a593SmuzhiyunPAD_CTL_DSE_HIGH (1 << 1) 28*4882a593SmuzhiyunPAD_CTL_DSE_MAX (2 << 1) 29*4882a593SmuzhiyunPAD_CTL_SRE_FAST (1 << 0) 30*4882a593SmuzhiyunPAD_CTL_SRE_SLOW (0 << 0) 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunRefer to imx35-pinfunc.h in device tree source folder for all available 33*4882a593Smuzhiyunimx35 PIN_FUNC_ID. 34