xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/bitmain,bm1880-pinctrl.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunBitmain BM1880 Pin Controller
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThis binding describes the pin controller found in the BM1880 SoC.
4*4882a593Smuzhiyun
5*4882a593SmuzhiyunRequired Properties:
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun- compatible:   Should be "bitmain,bm1880-pinctrl"
8*4882a593Smuzhiyun- reg:          Offset and length of pinctrl space in SCTRL.
9*4882a593Smuzhiyun
10*4882a593SmuzhiyunPlease refer to pinctrl-bindings.txt in this directory for details of the
11*4882a593Smuzhiyuncommon pinctrl bindings used by client devices, including the meaning of the
12*4882a593Smuzhiyunphrase "pin configuration node".
13*4882a593Smuzhiyun
14*4882a593SmuzhiyunThe pin configuration nodes act as a container for an arbitrary number of
15*4882a593Smuzhiyunsubnodes. Each of these subnodes represents some desired configuration for a
16*4882a593Smuzhiyunpin, a group, or a list of pins or groups. This configuration for BM1880 SoC
17*4882a593Smuzhiyunincludes pinmux and various pin configuration parameters, such as pull-up,
18*4882a593Smuzhiyunslew rate etc...
19*4882a593Smuzhiyun
20*4882a593SmuzhiyunEach configuration node can consist of multiple nodes describing the pinmux
21*4882a593Smuzhiyunoptions. The name of each subnode is not important; all subnodes should be
22*4882a593Smuzhiyunenumerated and processed purely based on their content.
23*4882a593Smuzhiyun
24*4882a593SmuzhiyunThe following generic properties as defined in pinctrl-bindings.txt are valid
25*4882a593Smuzhiyunto specify in a pinmux subnode:
26*4882a593Smuzhiyun
27*4882a593SmuzhiyunRequired Properties:
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun- pins:           An array of strings, each string containing the name of a pin.
30*4882a593Smuzhiyun                  Valid values for pins are:
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun                  MIO0 - MIO111
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun- groups:         An array of strings, each string containing the name of a pin
35*4882a593Smuzhiyun                  group. Valid values for groups are:
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun                  nand_grp, spi_grp, emmc_grp, sdio_grp, eth0_grp, pwm0_grp,
38*4882a593Smuzhiyun                  pwm1_grp, pwm2_grp, pwm3_grp, pwm4_grp, pwm5_grp, pwm6_grp,
39*4882a593Smuzhiyun                  pwm7_grp, pwm8_grp, pwm9_grp, pwm10_grp, pwm11_grp, pwm12_grp,
40*4882a593Smuzhiyun                  pwm13_grp, pwm14_grp, pwm15_grp, pwm16_grp, pwm17_grp,
41*4882a593Smuzhiyun                  pwm18_grp, pwm19_grp, pwm20_grp, pwm21_grp, pwm22_grp,
42*4882a593Smuzhiyun                  pwm23_grp, pwm24_grp, pwm25_grp, pwm26_grp, pwm27_grp,
43*4882a593Smuzhiyun                  pwm28_grp, pwm29_grp, pwm30_grp, pwm31_grp, pwm32_grp,
44*4882a593Smuzhiyun                  pwm33_grp, pwm34_grp, pwm35_grp, pwm36_grp, i2c0_grp,
45*4882a593Smuzhiyun                  i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp, uart0_grp, uart1_grp,
46*4882a593Smuzhiyun                  uart2_grp, uart3_grp, uart4_grp, uart5_grp, uart6_grp,
47*4882a593Smuzhiyun                  uart7_grp, uart8_grp, uart9_grp, uart10_grp, uart11_grp,
48*4882a593Smuzhiyun                  uart12_grp, uart13_grp, uart14_grp, uart15_grp, gpio0_grp,
49*4882a593Smuzhiyun                  gpio1_grp, gpio2_grp, gpio3_grp, gpio4_grp, gpio5_grp,
50*4882a593Smuzhiyun                  gpio6_grp, gpio7_grp, gpio8_grp, gpio9_grp, gpio10_grp,
51*4882a593Smuzhiyun                  gpio11_grp, gpio12_grp, gpio13_grp, gpio14_grp, gpio15_grp,
52*4882a593Smuzhiyun                  gpio16_grp, gpio17_grp, gpio18_grp, gpio19_grp, gpio20_grp,
53*4882a593Smuzhiyun                  gpio21_grp, gpio22_grp, gpio23_grp, gpio24_grp, gpio25_grp,
54*4882a593Smuzhiyun                  gpio26_grp, gpio27_grp, gpio28_grp, gpio29_grp, gpio30_grp,
55*4882a593Smuzhiyun                  gpio31_grp, gpio32_grp, gpio33_grp, gpio34_grp, gpio35_grp,
56*4882a593Smuzhiyun                  gpio36_grp, gpio37_grp, gpio38_grp, gpio39_grp, gpio40_grp,
57*4882a593Smuzhiyun                  gpio41_grp, gpio42_grp, gpio43_grp, gpio44_grp, gpio45_grp,
58*4882a593Smuzhiyun                  gpio46_grp, gpio47_grp, gpio48_grp, gpio49_grp, gpio50_grp,
59*4882a593Smuzhiyun                  gpio51_grp, gpio52_grp, gpio53_grp, gpio54_grp, gpio55_grp,
60*4882a593Smuzhiyun                  gpio56_grp, gpio57_grp, gpio58_grp, gpio59_grp, gpio60_grp,
61*4882a593Smuzhiyun                  gpio61_grp, gpio62_grp, gpio63_grp, gpio64_grp, gpio65_grp,
62*4882a593Smuzhiyun                  gpio66_grp, gpio67_grp, eth1_grp, i2s0_grp, i2s0_mclkin_grp,
63*4882a593Smuzhiyun                  i2s1_grp, i2s1_mclkin_grp, spi0_grp
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun- function:       An array of strings, each string containing the name of the
66*4882a593Smuzhiyun                  pinmux functions. The following are the list of pinmux
67*4882a593Smuzhiyun                  functions available:
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun                  nand, spi, emmc, sdio, eth0, pwm0, pwm1, pwm2, pwm3, pwm4,
70*4882a593Smuzhiyun                  pwm5, pwm6, pwm7, pwm8, pwm9, pwm10, pwm11, pwm12, pwm13,
71*4882a593Smuzhiyun                  pwm14, pwm15, pwm16, pwm17, pwm18, pwm19, pwm20, pwm21, pwm22,
72*4882a593Smuzhiyun                  pwm23, pwm24, pwm25, pwm26, pwm27, pwm28, pwm29, pwm30, pwm31,
73*4882a593Smuzhiyun                  pwm32, pwm33, pwm34, pwm35, pwm36, i2c0, i2c1, i2c2, i2c3,
74*4882a593Smuzhiyun                  i2c4, uart0, uart1, uart2, uart3, uart4, uart5, uart6, uart7,
75*4882a593Smuzhiyun                  uart8, uart9, uart10, uart11, uart12, uart13, uart14, uart15,
76*4882a593Smuzhiyun                  gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7, gpio8,
77*4882a593Smuzhiyun                  gpio9, gpio10, gpio11, gpio12, gpio13, gpio14, gpio15, gpio16,
78*4882a593Smuzhiyun                  gpio17, gpio18, gpio19, gpio20, gpio21, gpio22, gpio23,
79*4882a593Smuzhiyun                  gpio24, gpio25, gpio26, gpio27, gpio28, gpio29, gpio30,
80*4882a593Smuzhiyun                  gpio31, gpio32, gpio33, gpio34, gpio35, gpio36, gpio37,
81*4882a593Smuzhiyun                  gpio38, gpio39, gpio40, gpio41, gpio42, gpio43, gpio44,
82*4882a593Smuzhiyun                  gpio45, gpio46, gpio47, gpio48, gpio49, gpio50, gpio51,
83*4882a593Smuzhiyun                  gpio52, gpio53, gpio54, gpio55, gpio56, gpio57, gpio58,
84*4882a593Smuzhiyun                  gpio59, gpio60, gpio61, gpio62, gpio63, gpio64, gpio65,
85*4882a593Smuzhiyun                  gpio66, gpio67, eth1, i2s0, i2s0_mclkin, i2s1, i2s1_mclkin,
86*4882a593Smuzhiyun                  spi0
87*4882a593Smuzhiyun
88*4882a593SmuzhiyunOptional Properties:
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun- bias-disable:  No arguments. Disable pin bias.
91*4882a593Smuzhiyun- bias-pull-down: No arguments. The specified pins should be configured as
92*4882a593Smuzhiyun                  pull down.
93*4882a593Smuzhiyun- bias-pull-up:   No arguments. The specified pins should be configured as
94*4882a593Smuzhiyun                  pull up.
95*4882a593Smuzhiyun- input-schmitt-enable: No arguments: Enable schmitt trigger for the specified
96*4882a593Smuzhiyun                  pins
97*4882a593Smuzhiyun- input-schmitt-disable: No arguments: Disable schmitt trigger for the specified
98*4882a593Smuzhiyun                  pins
99*4882a593Smuzhiyun- slew-rate:      Integer. Sets slew rate for the specified pins.
100*4882a593Smuzhiyun                  Valid values are:
101*4882a593Smuzhiyun                  <0>  - Slow
102*4882a593Smuzhiyun                  <1>  - Fast
103*4882a593Smuzhiyun- drive-strength: Integer. Selects the drive strength for the specified
104*4882a593Smuzhiyun                  pins in mA.
105*4882a593Smuzhiyun                  Valid values are:
106*4882a593Smuzhiyun                  <4>
107*4882a593Smuzhiyun                  <8>
108*4882a593Smuzhiyun                  <12>
109*4882a593Smuzhiyun                  <16>
110*4882a593Smuzhiyun                  <20>
111*4882a593Smuzhiyun                  <24>
112*4882a593Smuzhiyun                  <28>
113*4882a593Smuzhiyun                  <32>
114*4882a593Smuzhiyun
115*4882a593SmuzhiyunExample:
116*4882a593Smuzhiyun        pinctrl: pinctrl@400 {
117*4882a593Smuzhiyun                compatible = "bitmain,bm1880-pinctrl";
118*4882a593Smuzhiyun                reg = <0x400 0x120>;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun                pinctrl_uart0_default: uart0-default {
121*4882a593Smuzhiyun                        pinmux {
122*4882a593Smuzhiyun                                groups = "uart0_grp";
123*4882a593Smuzhiyun                                function = "uart0";
124*4882a593Smuzhiyun                        };
125*4882a593Smuzhiyun                };
126*4882a593Smuzhiyun        };
127