1*4882a593SmuzhiyunRockchip EMMC PHY 2*4882a593Smuzhiyun----------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun - compatible: rockchip,rk3399-emmc-phy 6*4882a593Smuzhiyun - #phy-cells: must be 0 7*4882a593Smuzhiyun - reg: PHY register address offset and length in "general 8*4882a593Smuzhiyun register files" 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunOptional properties: 11*4882a593Smuzhiyun - clock-names: Should contain "emmcclk". Although this is listed as optional 12*4882a593Smuzhiyun (because most boards can get basic functionality without having 13*4882a593Smuzhiyun access to it), it is strongly suggested. 14*4882a593Smuzhiyun See ../clock/clock-bindings.txt for details. 15*4882a593Smuzhiyun - clocks: Should have a phandle to the card clock exported by the SDHCI driver. 16*4882a593Smuzhiyun - drive-impedance-ohm: Specifies the drive impedance in Ohm. 17*4882a593Smuzhiyun Possible values are 33, 40, 50, 66 and 100. 18*4882a593Smuzhiyun If not set, the default value of 50 will be applied. 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunExample: 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun 23*4882a593Smuzhiyungrf: syscon@ff770000 { 24*4882a593Smuzhiyun compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; 25*4882a593Smuzhiyun #address-cells = <1>; 26*4882a593Smuzhiyun #size-cells = <1>; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun... 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun emmcphy: phy@f780 { 31*4882a593Smuzhiyun compatible = "rockchip,rk3399-emmc-phy"; 32*4882a593Smuzhiyun reg = <0xf780 0x20>; 33*4882a593Smuzhiyun clocks = <&sdhci>; 34*4882a593Smuzhiyun clock-names = "emmcclk"; 35*4882a593Smuzhiyun drive-impedance-ohm = <50>; 36*4882a593Smuzhiyun #phy-cells = <0>; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun}; 39