1*4882a593Smuzhiyun* Renesas R-Car generation 3 PCIe PHY 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis file provides information on what the device node for the R-Car 4*4882a593Smuzhiyungeneration 3 PCIe PHY contains. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun- compatible: "renesas,r8a77980-pcie-phy" if the device is a part of the 8*4882a593Smuzhiyun R8A77980 SoC. 9*4882a593Smuzhiyun- reg: offset and length of the register block. 10*4882a593Smuzhiyun- clocks: clock phandle and specifier pair. 11*4882a593Smuzhiyun- power-domains: power domain phandle and specifier pair. 12*4882a593Smuzhiyun- resets: reset phandle and specifier pair. 13*4882a593Smuzhiyun- #phy-cells: see phy-bindings.txt in the same directory, must be <0>. 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunExample (R-Car V3H): 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun pcie-phy@e65d0000 { 18*4882a593Smuzhiyun compatible = "renesas,r8a77980-pcie-phy"; 19*4882a593Smuzhiyun reg = <0 0xe65d0000 0 0x8000>; 20*4882a593Smuzhiyun #phy-cells = <0>; 21*4882a593Smuzhiyun clocks = <&cpg CPG_MOD 319>; 22*4882a593Smuzhiyun power-domains = <&sysc 32>; 23*4882a593Smuzhiyun resets = <&cpg 319>; 24*4882a593Smuzhiyun }; 25