1*4882a593SmuzhiyunQualcomm IPQ806x SATA PHY Controller 2*4882a593Smuzhiyun------------------------------------ 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunSATA PHY nodes are defined to describe on-chip SATA Physical layer controllers. 5*4882a593SmuzhiyunEach SATA PHY controller should have its own node. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun- compatible: compatible list, contains "qcom,ipq806x-sata-phy" 9*4882a593Smuzhiyun- reg: offset and length of the SATA PHY register set; 10*4882a593Smuzhiyun- #phy-cells: must be zero 11*4882a593Smuzhiyun- clocks: must be exactly one entry 12*4882a593Smuzhiyun- clock-names: must be "cfg" 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunExample: 15*4882a593Smuzhiyun sata_phy: sata-phy@1b400000 { 16*4882a593Smuzhiyun compatible = "qcom,ipq806x-sata-phy"; 17*4882a593Smuzhiyun reg = <0x1b400000 0x200>; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun clocks = <&gcc SATA_PHY_CFG_CLK>; 20*4882a593Smuzhiyun clock-names = "cfg"; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #phy-cells = <0>; 23*4882a593Smuzhiyun }; 24