1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-ss.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Qualcomm ipq806x usb DWC3 SS PHY CONTROLLER 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Ansuel Smith <ansuelsmth@gmail.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: 13*4882a593Smuzhiyun DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer 14*4882a593Smuzhiyun controllers used in ipq806x. Each DWC3 PHY controller should have its 15*4882a593Smuzhiyun own node. 16*4882a593Smuzhiyun 17*4882a593Smuzhiyunproperties: 18*4882a593Smuzhiyun compatible: 19*4882a593Smuzhiyun const: qcom,ipq806x-usb-phy-ss 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun "#phy-cells": 22*4882a593Smuzhiyun const: 0 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun reg: 25*4882a593Smuzhiyun maxItems: 1 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun clocks: 28*4882a593Smuzhiyun minItems: 1 29*4882a593Smuzhiyun maxItems: 2 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun clock-names: 32*4882a593Smuzhiyun minItems: 1 33*4882a593Smuzhiyun maxItems: 2 34*4882a593Smuzhiyun items: 35*4882a593Smuzhiyun - const: ref 36*4882a593Smuzhiyun - const: xo 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun qcom,rx-eq: 39*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32 40*4882a593Smuzhiyun description: Override value for rx_eq. 41*4882a593Smuzhiyun default: 4 42*4882a593Smuzhiyun maximum: 7 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun qcom,tx-deamp-3_5db: 45*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32 46*4882a593Smuzhiyun description: Override value for transmit preemphasis. 47*4882a593Smuzhiyun default: 23 48*4882a593Smuzhiyun maximum: 63 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun qcom,mpll: 51*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32 52*4882a593Smuzhiyun description: Override value for mpll. 53*4882a593Smuzhiyun default: 0 54*4882a593Smuzhiyun maximum: 7 55*4882a593Smuzhiyun 56*4882a593Smuzhiyunrequired: 57*4882a593Smuzhiyun - compatible 58*4882a593Smuzhiyun - "#phy-cells" 59*4882a593Smuzhiyun - reg 60*4882a593Smuzhiyun - clocks 61*4882a593Smuzhiyun - clock-names 62*4882a593Smuzhiyun 63*4882a593SmuzhiyunadditionalProperties: false 64*4882a593Smuzhiyun 65*4882a593Smuzhiyunexamples: 66*4882a593Smuzhiyun - | 67*4882a593Smuzhiyun #include <dt-bindings/clock/qcom,gcc-ipq806x.h> 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun ss_phy_0: phy@110f8830 { 70*4882a593Smuzhiyun compatible = "qcom,ipq806x-usb-phy-ss"; 71*4882a593Smuzhiyun reg = <0x110f8830 0x30>; 72*4882a593Smuzhiyun clocks = <&gcc USB30_0_MASTER_CLK>; 73*4882a593Smuzhiyun clock-names = "ref"; 74*4882a593Smuzhiyun #phy-cells = <0>; 75*4882a593Smuzhiyun }; 76