1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/phy/qcom,usb-ss.yaml#" 5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Bryan O'Donoghue <bryan.odonoghue@linaro.org> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun compatible: 17*4882a593Smuzhiyun enum: 18*4882a593Smuzhiyun - qcom,usb-ss-28nm-phy 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun reg: 21*4882a593Smuzhiyun maxItems: 1 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun "#phy-cells": 24*4882a593Smuzhiyun const: 0 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun clocks: 27*4882a593Smuzhiyun items: 28*4882a593Smuzhiyun - description: rpmcc clock 29*4882a593Smuzhiyun - description: PHY AHB clock 30*4882a593Smuzhiyun - description: SuperSpeed pipe clock 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun clock-names: 33*4882a593Smuzhiyun items: 34*4882a593Smuzhiyun - const: ref 35*4882a593Smuzhiyun - const: ahb 36*4882a593Smuzhiyun - const: pipe 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun vdd-supply: 39*4882a593Smuzhiyun description: phandle to the regulator VDD supply node. 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun vdda1p8-supply: 42*4882a593Smuzhiyun description: phandle to the regulator 1.8V supply node. 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun resets: 45*4882a593Smuzhiyun items: 46*4882a593Smuzhiyun - description: COM reset 47*4882a593Smuzhiyun - description: PHY reset line 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun reset-names: 50*4882a593Smuzhiyun items: 51*4882a593Smuzhiyun - const: com 52*4882a593Smuzhiyun - const: phy 53*4882a593Smuzhiyun 54*4882a593Smuzhiyunrequired: 55*4882a593Smuzhiyun - compatible 56*4882a593Smuzhiyun - reg 57*4882a593Smuzhiyun - "#phy-cells" 58*4882a593Smuzhiyun - clocks 59*4882a593Smuzhiyun - clock-names 60*4882a593Smuzhiyun - vdd-supply 61*4882a593Smuzhiyun - vdda1p8-supply 62*4882a593Smuzhiyun 63*4882a593SmuzhiyunadditionalProperties: false 64*4882a593Smuzhiyun 65*4882a593Smuzhiyunexamples: 66*4882a593Smuzhiyun - | 67*4882a593Smuzhiyun #include <dt-bindings/clock/qcom,gcc-qcs404.h> 68*4882a593Smuzhiyun #include <dt-bindings/clock/qcom,rpmcc.h> 69*4882a593Smuzhiyun usb3_phy: usb3-phy@78000 { 70*4882a593Smuzhiyun compatible = "qcom,usb-ss-28nm-phy"; 71*4882a593Smuzhiyun reg = <0x78000 0x400>; 72*4882a593Smuzhiyun #phy-cells = <0>; 73*4882a593Smuzhiyun clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, 74*4882a593Smuzhiyun <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, 75*4882a593Smuzhiyun <&gcc GCC_USB3_PHY_PIPE_CLK>; 76*4882a593Smuzhiyun clock-names = "ref", "ahb", "pipe"; 77*4882a593Smuzhiyun resets = <&gcc GCC_USB3_PHY_BCR>, 78*4882a593Smuzhiyun <&gcc GCC_USB3PHY_PHY_BCR>; 79*4882a593Smuzhiyun reset-names = "com", "phy"; 80*4882a593Smuzhiyun vdd-supply = <&vreg_l3_1p05>; 81*4882a593Smuzhiyun vdda1p8-supply = <&vreg_l5_1p8>; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun... 84