1*4882a593SmuzhiyunROCKCHIP HDMI PHY WITH INNO IP BLOCK 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun - compatible : "rockchip,rk3228-hdmi-phy", 5*4882a593Smuzhiyun "rockchip,rk3328-hdmi-phy"; 6*4882a593Smuzhiyun - reg : the address offset of register for hdmi phy configuration. 7*4882a593Smuzhiyun - #phy-cells : must be 0. See ./phy-bindings.txt for details. 8*4882a593Smuzhiyun - clocks and clock-names: 9*4882a593Smuzhiyun - the "sysclk" clock is required by the phy module, used to system 10*4882a593Smuzhiyun control and register configuration 11*4882a593Smuzhiyun - the "refclk" clock is reference crystal oscillator clock input 12*4882a593Smuzhiyun to PLL 13*4882a593Smuzhiyun - #clock-cells: should be 0. 14*4882a593Smuzhiyun - clock-output-names : shall be the corresponding names of the outputs. 15*4882a593Smuzhiyun - rockchip,phy-table: the parameter table of hdmi phy configuration. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunExample: 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun hdmi_phy: hdmi-phy@12030000 { 20*4882a593Smuzhiyun compatible = "rockchip,rk3228-hdmi-phy"; 21*4882a593Smuzhiyun reg = <0x12030000 0x10000>; 22*4882a593Smuzhiyun #phy-cells = <0>; 23*4882a593Smuzhiyun clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>; 24*4882a593Smuzhiyun clock-names = "sysclk", "refclk"; 25*4882a593Smuzhiyun #clock-cells = <0>; 26*4882a593Smuzhiyun clock-output-names = "hdmiphy_phy"; 27*4882a593Smuzhiyun rockchip,phy-table = 28*4882a593Smuzhiyun <165000000 0x07 0x0a 0x0a 0x0a 0x00 0x00 0x08 29*4882a593Smuzhiyun 0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>, 30*4882a593Smuzhiyun <340000000 0x0b 0x0d 0x0d 0x0d 0x07 0x15 0x08 31*4882a593Smuzhiyun 0x08 0x08 0x3f 0xac 0xcc 0xcd 0xdd>, 32*4882a593Smuzhiyun <594000000 0x10 0x1a 0x1a 0x1a 0x07 0x15 0x08 33*4882a593Smuzhiyun 0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>; 34*4882a593Smuzhiyun status = "disabled"; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunThen the PHY can be used in other nodes such as: 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun hdmi: hdmi@200a0000 { 40*4882a593Smuzhiyun compatible = "rockchip,rk3228-dw-hdmi"; 41*4882a593Smuzhiyun ... 42*4882a593Smuzhiyun phys = <&hdmi_phy>; 43*4882a593Smuzhiyun phy-names = "hdmi_phy"; 44*4882a593Smuzhiyun ... 45*4882a593Smuzhiyun }; 46