1*4882a593SmuzhiyunMVEBU A3700 UTMI PHY 2*4882a593Smuzhiyun-------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunUSB2 UTMI+ PHY controllers can be found on the following Marvell MVEBU SoCs: 5*4882a593Smuzhiyun* Armada 3700 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunOn Armada 3700, there are two USB controllers, one is compatible with the USB2 8*4882a593Smuzhiyunand USB3 specifications and supports OTG. The other one is USB2 compliant and 9*4882a593Smuzhiyunonly supports host mode. Both of these controllers come with a slightly 10*4882a593Smuzhiyundifferent UTMI PHY. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunRequired Properties: 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun- compatible: Should be one of: 15*4882a593Smuzhiyun * "marvell,a3700-utmi-host-phy" for the PHY connected to 16*4882a593Smuzhiyun the USB2 host-only controller. 17*4882a593Smuzhiyun * "marvell,a3700-utmi-otg-phy" for the PHY connected to 18*4882a593Smuzhiyun the USB3 and USB2 OTG capable controller. 19*4882a593Smuzhiyun- reg: PHY IP register range. 20*4882a593Smuzhiyun- marvell,usb-misc-reg: handle on the "USB miscellaneous registers" shared 21*4882a593Smuzhiyun region covering registers related to both the host 22*4882a593Smuzhiyun controller and the PHY. 23*4882a593Smuzhiyun- #phy-cells: Standard property (Documentation: phy-bindings.txt) Should be 0. 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunExample: 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun usb2_utmi_host_phy: phy@5f000 { 29*4882a593Smuzhiyun compatible = "marvell,armada-3700-utmi-host-phy"; 30*4882a593Smuzhiyun reg = <0x5f000 0x800>; 31*4882a593Smuzhiyun marvell,usb-misc-reg = <&usb2_syscon>; 32*4882a593Smuzhiyun #phy-cells = <0>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun usb2_syscon: system-controller@5f800 { 36*4882a593Smuzhiyun compatible = "marvell,armada-3700-usb2-host-misc", "syscon"; 37*4882a593Smuzhiyun reg = <0x5f800 0x800>; 38*4882a593Smuzhiyun }; 39