1*4882a593SmuzhiyunNXP LPC18xx/43xx internal USB OTG PHY binding 2*4882a593Smuzhiyun--------------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThis file contains documentation for the internal USB OTG PHY found 5*4882a593Smuzhiyunin NXP LPC18xx and LPC43xx SoCs. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun- compatible : must be "nxp,lpc1850-usb-otg-phy" 9*4882a593Smuzhiyun- clocks : must be exactly one entry 10*4882a593SmuzhiyunSee: Documentation/devicetree/bindings/clock/clock-bindings.txt 11*4882a593Smuzhiyun- #phy-cells : must be 0 for this phy 12*4882a593SmuzhiyunSee: Documentation/devicetree/bindings/phy/phy-bindings.txt 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunThe phy node must be a child of the creg syscon node. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunExample: 17*4882a593Smuzhiyuncreg: syscon@40043000 { 18*4882a593Smuzhiyun compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd"; 19*4882a593Smuzhiyun reg = <0x40043000 0x1000>; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun usb0_otg_phy: phy { 22*4882a593Smuzhiyun compatible = "nxp,lpc1850-usb-otg-phy"; 23*4882a593Smuzhiyun clocks = <&ccu1 CLK_USB0>; 24*4882a593Smuzhiyun #phy-cells = <0>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun}; 27