1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun# Copyright 2019 Lubomir Rintel <lkundrak@v3.sk> 3*4882a593Smuzhiyun%YAML 1.2 4*4882a593Smuzhiyun--- 5*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/phy/marvell,mmp3-hsic-phy.yaml#" 6*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyuntitle: Marvell MMP3 HSIC PHY 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunmaintainers: 11*4882a593Smuzhiyun - Lubomir Rintel <lkundrak@v3.sk> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunproperties: 14*4882a593Smuzhiyun compatible: 15*4882a593Smuzhiyun const: marvell,mmp3-hsic-phy 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun reg: 18*4882a593Smuzhiyun maxItems: 1 19*4882a593Smuzhiyun description: base address of the device 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun reset-gpios: 22*4882a593Smuzhiyun maxItems: 1 23*4882a593Smuzhiyun description: GPIO connected to reset 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun "#phy-cells": 26*4882a593Smuzhiyun const: 0 27*4882a593Smuzhiyun 28*4882a593Smuzhiyunrequired: 29*4882a593Smuzhiyun - compatible 30*4882a593Smuzhiyun - reg 31*4882a593Smuzhiyun - reset-gpios 32*4882a593Smuzhiyun - "#phy-cells" 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunadditionalProperties: false 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunexamples: 37*4882a593Smuzhiyun - | 38*4882a593Smuzhiyun #include <dt-bindings/gpio/gpio.h> 39*4882a593Smuzhiyun hsic-phy@f0001800 { 40*4882a593Smuzhiyun compatible = "marvell,mmp3-hsic-phy"; 41*4882a593Smuzhiyun reg = <0xf0001800 0x40>; 42*4882a593Smuzhiyun reset-gpios = <&gpio 63 GPIO_ACTIVE_HIGH>; 43*4882a593Smuzhiyun #phy-cells = <0>; 44*4882a593Smuzhiyun }; 45