xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/phy/intel,lgm-usb-phy.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Intel LGM USB PHY Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Vadivel Murugan Ramuthevar <vadivel.muruganx.ramuthevar@linux.intel.com>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyunproperties:
13*4882a593Smuzhiyun  compatible:
14*4882a593Smuzhiyun    const: intel,lgm-usb-phy
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun  reg:
17*4882a593Smuzhiyun    maxItems: 1
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun  clocks:
20*4882a593Smuzhiyun    maxItems: 1
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun  resets:
23*4882a593Smuzhiyun    items:
24*4882a593Smuzhiyun      - description: USB PHY and Host controller reset
25*4882a593Smuzhiyun      - description: APB BUS reset
26*4882a593Smuzhiyun      - description: General Hardware reset
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun  reset-names:
29*4882a593Smuzhiyun    items:
30*4882a593Smuzhiyun      - const: phy
31*4882a593Smuzhiyun      - const: apb
32*4882a593Smuzhiyun      - const: phy31
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun  "#phy-cells":
35*4882a593Smuzhiyun    const: 0
36*4882a593Smuzhiyun
37*4882a593Smuzhiyunrequired:
38*4882a593Smuzhiyun  - compatible
39*4882a593Smuzhiyun  - clocks
40*4882a593Smuzhiyun  - reg
41*4882a593Smuzhiyun  - resets
42*4882a593Smuzhiyun  - reset-names
43*4882a593Smuzhiyun  - "#phy-cells"
44*4882a593Smuzhiyun
45*4882a593SmuzhiyunadditionalProperties: false
46*4882a593Smuzhiyun
47*4882a593Smuzhiyunexamples:
48*4882a593Smuzhiyun  - |
49*4882a593Smuzhiyun    usb-phy@e7e00000 {
50*4882a593Smuzhiyun        compatible = "intel,lgm-usb-phy";
51*4882a593Smuzhiyun        reg = <0xe7e00000 0x10000>;
52*4882a593Smuzhiyun        clocks = <&cgu0 153>;
53*4882a593Smuzhiyun        resets = <&rcu 0x70 0x24>,
54*4882a593Smuzhiyun                 <&rcu 0x70 0x26>,
55*4882a593Smuzhiyun                 <&rcu 0x70 0x28>;
56*4882a593Smuzhiyun        reset-names = "phy", "apb", "phy31";
57*4882a593Smuzhiyun        #phy-cells = <0>;
58*4882a593Smuzhiyun    };
59