1*4882a593Smuzhiyun* Freescale i.MX8MQ USB3 PHY binding 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Should be "fsl,imx8mq-usb-phy" or "fsl,imx8mp-usb-phy" 5*4882a593Smuzhiyun- #phys-cells: must be 0 (see phy-bindings.txt in this directory) 6*4882a593Smuzhiyun- reg: The base address and length of the registers 7*4882a593Smuzhiyun- clocks: phandles to the clocks for each clock listed in clock-names 8*4882a593Smuzhiyun- clock-names: must contain "phy" 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunOptional properties: 11*4882a593Smuzhiyun- vbus-supply: A phandle to the regulator for USB VBUS. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunExample: 14*4882a593Smuzhiyun usb3_phy0: phy@381f0040 { 15*4882a593Smuzhiyun compatible = "fsl,imx8mq-usb-phy"; 16*4882a593Smuzhiyun reg = <0x381f0040 0x40>; 17*4882a593Smuzhiyun clocks = <&clk IMX8MQ_CLK_USB1_PHY_ROOT>; 18*4882a593Smuzhiyun clock-names = "phy"; 19*4882a593Smuzhiyun #phy-cells = <0>; 20*4882a593Smuzhiyun }; 21