1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-mipi-dphy.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Allwinner A31 MIPI D-PHY Controller Device Tree Bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Chen-Yu Tsai <wens@csie.org> 11*4882a593Smuzhiyun - Maxime Ripard <mripard@kernel.org> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunproperties: 14*4882a593Smuzhiyun "#phy-cells": 15*4882a593Smuzhiyun const: 0 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun compatible: 18*4882a593Smuzhiyun oneOf: 19*4882a593Smuzhiyun - const: allwinner,sun6i-a31-mipi-dphy 20*4882a593Smuzhiyun - items: 21*4882a593Smuzhiyun - const: allwinner,sun50i-a64-mipi-dphy 22*4882a593Smuzhiyun - const: allwinner,sun6i-a31-mipi-dphy 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun reg: 25*4882a593Smuzhiyun maxItems: 1 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun clocks: 28*4882a593Smuzhiyun items: 29*4882a593Smuzhiyun - description: Bus Clock 30*4882a593Smuzhiyun - description: Module Clock 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun clock-names: 33*4882a593Smuzhiyun items: 34*4882a593Smuzhiyun - const: bus 35*4882a593Smuzhiyun - const: mod 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun resets: 38*4882a593Smuzhiyun maxItems: 1 39*4882a593Smuzhiyun 40*4882a593Smuzhiyunrequired: 41*4882a593Smuzhiyun - "#phy-cells" 42*4882a593Smuzhiyun - compatible 43*4882a593Smuzhiyun - reg 44*4882a593Smuzhiyun - clocks 45*4882a593Smuzhiyun - clock-names 46*4882a593Smuzhiyun - resets 47*4882a593Smuzhiyun 48*4882a593SmuzhiyunadditionalProperties: false 49*4882a593Smuzhiyun 50*4882a593Smuzhiyunexamples: 51*4882a593Smuzhiyun - | 52*4882a593Smuzhiyun dphy0: d-phy@1ca1000 { 53*4882a593Smuzhiyun compatible = "allwinner,sun6i-a31-mipi-dphy"; 54*4882a593Smuzhiyun reg = <0x01ca1000 0x1000>; 55*4882a593Smuzhiyun clocks = <&ccu 23>, <&ccu 97>; 56*4882a593Smuzhiyun clock-names = "bus", "mod"; 57*4882a593Smuzhiyun resets = <&ccu 4>; 58*4882a593Smuzhiyun #phy-cells = <0>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun... 62