xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/phy/allwinner,sun4i-a10-usb-phy.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Allwinner A10 USB PHY Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Chen-Yu Tsai <wens@csie.org>
11*4882a593Smuzhiyun  - Maxime Ripard <mripard@kernel.org>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyunproperties:
14*4882a593Smuzhiyun  "#phy-cells":
15*4882a593Smuzhiyun    const: 1
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun  compatible:
18*4882a593Smuzhiyun    enum:
19*4882a593Smuzhiyun      - allwinner,sun4i-a10-usb-phy
20*4882a593Smuzhiyun      - allwinner,sun7i-a20-usb-phy
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun  reg:
23*4882a593Smuzhiyun    items:
24*4882a593Smuzhiyun      - description: PHY Control registers
25*4882a593Smuzhiyun      - description: PHY PMU1 registers
26*4882a593Smuzhiyun      - description: PHY PMU2 registers
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun  reg-names:
29*4882a593Smuzhiyun    items:
30*4882a593Smuzhiyun      - const: phy_ctrl
31*4882a593Smuzhiyun      - const: pmu1
32*4882a593Smuzhiyun      - const: pmu2
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun  clocks:
35*4882a593Smuzhiyun    maxItems: 1
36*4882a593Smuzhiyun    description: USB PHY bus clock
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun  clock-names:
39*4882a593Smuzhiyun    const: usb_phy
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun  resets:
42*4882a593Smuzhiyun    items:
43*4882a593Smuzhiyun      - description: USB OTG reset
44*4882a593Smuzhiyun      - description: USB Host 1 Controller reset
45*4882a593Smuzhiyun      - description: USB Host 2 Controller reset
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun  reset-names:
48*4882a593Smuzhiyun    items:
49*4882a593Smuzhiyun      - const: usb0_reset
50*4882a593Smuzhiyun      - const: usb1_reset
51*4882a593Smuzhiyun      - const: usb2_reset
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun  usb0_id_det-gpios:
54*4882a593Smuzhiyun    description: GPIO to the USB OTG ID pin
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun  usb0_vbus_det-gpios:
57*4882a593Smuzhiyun    description: GPIO to the USB OTG VBUS detect pin
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun  usb0_vbus_power-supply:
60*4882a593Smuzhiyun    description: Power supply to detect the USB OTG VBUS
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun  usb0_vbus-supply:
63*4882a593Smuzhiyun    description: Regulator controlling USB OTG VBUS
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun  usb1_vbus-supply:
66*4882a593Smuzhiyun    description: Regulator controlling USB1 Host controller
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun  usb2_vbus-supply:
69*4882a593Smuzhiyun    description: Regulator controlling USB2 Host controller
70*4882a593Smuzhiyun
71*4882a593Smuzhiyunrequired:
72*4882a593Smuzhiyun  - "#phy-cells"
73*4882a593Smuzhiyun  - compatible
74*4882a593Smuzhiyun  - clocks
75*4882a593Smuzhiyun  - clock-names
76*4882a593Smuzhiyun  - reg
77*4882a593Smuzhiyun  - reg-names
78*4882a593Smuzhiyun  - resets
79*4882a593Smuzhiyun  - reset-names
80*4882a593Smuzhiyun
81*4882a593SmuzhiyunadditionalProperties: false
82*4882a593Smuzhiyun
83*4882a593Smuzhiyunexamples:
84*4882a593Smuzhiyun  - |
85*4882a593Smuzhiyun    #include <dt-bindings/gpio/gpio.h>
86*4882a593Smuzhiyun    #include <dt-bindings/clock/sun4i-a10-ccu.h>
87*4882a593Smuzhiyun    #include <dt-bindings/reset/sun4i-a10-ccu.h>
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun    usbphy: phy@1c13400 {
90*4882a593Smuzhiyun        #phy-cells = <1>;
91*4882a593Smuzhiyun        compatible = "allwinner,sun4i-a10-usb-phy";
92*4882a593Smuzhiyun        reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;
93*4882a593Smuzhiyun        reg-names = "phy_ctrl", "pmu1", "pmu2";
94*4882a593Smuzhiyun        clocks = <&ccu CLK_USB_PHY>;
95*4882a593Smuzhiyun        clock-names = "usb_phy";
96*4882a593Smuzhiyun        resets = <&ccu RST_USB_PHY0>,
97*4882a593Smuzhiyun                 <&ccu RST_USB_PHY1>,
98*4882a593Smuzhiyun                 <&ccu RST_USB_PHY2>;
99*4882a593Smuzhiyun        reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
100*4882a593Smuzhiyun        usb0_id_det-gpios = <&pio 7 19 GPIO_ACTIVE_HIGH>;
101*4882a593Smuzhiyun        usb0_vbus_det-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>;
102*4882a593Smuzhiyun        usb0_vbus-supply = <&reg_usb0_vbus>;
103*4882a593Smuzhiyun        usb1_vbus-supply = <&reg_usb1_vbus>;
104*4882a593Smuzhiyun        usb2_vbus-supply = <&reg_usb2_vbus>;
105*4882a593Smuzhiyun    };
106