xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Allwinner A80 USB PHY Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Chen-Yu Tsai <wens@csie.org>
11*4882a593Smuzhiyun  - Maxime Ripard <mripard@kernel.org>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyunproperties:
14*4882a593Smuzhiyun  "#phy-cells":
15*4882a593Smuzhiyun    const: 0
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun  compatible:
18*4882a593Smuzhiyun    const: allwinner,sun9i-a80-usb-phy
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun  reg:
21*4882a593Smuzhiyun    maxItems: 1
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun  clocks:
24*4882a593Smuzhiyun    anyOf:
25*4882a593Smuzhiyun      - description: Main PHY Clock
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun      - items:
28*4882a593Smuzhiyun          - description: Main PHY clock
29*4882a593Smuzhiyun          - description: HSIC 12MHz clock
30*4882a593Smuzhiyun          - description: HSIC 480MHz clock
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  clock-names:
33*4882a593Smuzhiyun    oneOf:
34*4882a593Smuzhiyun      - const: phy
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun      - items:
37*4882a593Smuzhiyun          - const: phy
38*4882a593Smuzhiyun          - const: hsic_12M
39*4882a593Smuzhiyun          - const: hsic_480M
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun  resets:
42*4882a593Smuzhiyun    anyOf:
43*4882a593Smuzhiyun      - description: Normal USB PHY reset
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun      - items:
46*4882a593Smuzhiyun          - description: Normal USB PHY reset
47*4882a593Smuzhiyun          - description: HSIC Reset
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun  reset-names:
50*4882a593Smuzhiyun    oneOf:
51*4882a593Smuzhiyun      - const: phy
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun      - items:
54*4882a593Smuzhiyun          - const: phy
55*4882a593Smuzhiyun          - const: hsic
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun  phy_type:
58*4882a593Smuzhiyun    const: hsic
59*4882a593Smuzhiyun    description:
60*4882a593Smuzhiyun      When absent, the PHY type will be assumed to be normal USB.
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun  phy-supply:
63*4882a593Smuzhiyun    description:
64*4882a593Smuzhiyun      Regulator that powers VBUS
65*4882a593Smuzhiyun
66*4882a593Smuzhiyunrequired:
67*4882a593Smuzhiyun  - "#phy-cells"
68*4882a593Smuzhiyun  - compatible
69*4882a593Smuzhiyun  - reg
70*4882a593Smuzhiyun  - clocks
71*4882a593Smuzhiyun  - clock-names
72*4882a593Smuzhiyun  - resets
73*4882a593Smuzhiyun  - reset-names
74*4882a593Smuzhiyun
75*4882a593SmuzhiyunadditionalProperties: false
76*4882a593Smuzhiyun
77*4882a593Smuzhiyunif:
78*4882a593Smuzhiyun  properties:
79*4882a593Smuzhiyun    phy_type:
80*4882a593Smuzhiyun      const: hsic
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun  required:
83*4882a593Smuzhiyun    - phy_type
84*4882a593Smuzhiyun
85*4882a593Smuzhiyunthen:
86*4882a593Smuzhiyun  properties:
87*4882a593Smuzhiyun    clocks:
88*4882a593Smuzhiyun      maxItems: 3
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun    clock-names:
91*4882a593Smuzhiyun      maxItems: 3
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun    resets:
94*4882a593Smuzhiyun      maxItems: 2
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun    reset-names:
97*4882a593Smuzhiyun      maxItems: 2
98*4882a593Smuzhiyun
99*4882a593Smuzhiyunexamples:
100*4882a593Smuzhiyun  - |
101*4882a593Smuzhiyun    #include <dt-bindings/clock/sun9i-a80-usb.h>
102*4882a593Smuzhiyun    #include <dt-bindings/reset/sun9i-a80-usb.h>
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun    usbphy1: phy@a00800 {
105*4882a593Smuzhiyun        compatible = "allwinner,sun9i-a80-usb-phy";
106*4882a593Smuzhiyun        reg = <0x00a00800 0x4>;
107*4882a593Smuzhiyun        clocks = <&usb_clocks CLK_USB0_PHY>;
108*4882a593Smuzhiyun        clock-names = "phy";
109*4882a593Smuzhiyun        resets = <&usb_clocks RST_USB0_PHY>;
110*4882a593Smuzhiyun        reset-names = "phy";
111*4882a593Smuzhiyun        phy-supply = <&reg_usb1_vbus>;
112*4882a593Smuzhiyun        #phy-cells = <0>;
113*4882a593Smuzhiyun    };
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun  - |
116*4882a593Smuzhiyun    #include <dt-bindings/clock/sun9i-a80-usb.h>
117*4882a593Smuzhiyun    #include <dt-bindings/reset/sun9i-a80-usb.h>
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun    usbphy3: phy@a02800 {
120*4882a593Smuzhiyun        compatible = "allwinner,sun9i-a80-usb-phy";
121*4882a593Smuzhiyun        reg = <0x00a02800 0x4>;
122*4882a593Smuzhiyun        clocks = <&usb_clocks CLK_USB2_PHY>,
123*4882a593Smuzhiyun                 <&usb_clocks CLK_USB_HSIC>,
124*4882a593Smuzhiyun                 <&usb_clocks CLK_USB2_HSIC>;
125*4882a593Smuzhiyun        clock-names = "phy",
126*4882a593Smuzhiyun                      "hsic_12M",
127*4882a593Smuzhiyun                      "hsic_480M";
128*4882a593Smuzhiyun        resets = <&usb_clocks RST_USB2_PHY>,
129*4882a593Smuzhiyun                 <&usb_clocks RST_USB2_HSIC>;
130*4882a593Smuzhiyun        reset-names = "phy",
131*4882a593Smuzhiyun                      "hsic";
132*4882a593Smuzhiyun        phy_type = "hsic";
133*4882a593Smuzhiyun        phy-supply = <&reg_usb3_vbus>;
134*4882a593Smuzhiyun        #phy-cells = <0>;
135*4882a593Smuzhiyun    };
136