xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-usb-phy.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Allwinner A31 USB PHY Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Chen-Yu Tsai <wens@csie.org>
11*4882a593Smuzhiyun  - Maxime Ripard <mripard@kernel.org>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyunproperties:
14*4882a593Smuzhiyun  "#phy-cells":
15*4882a593Smuzhiyun    const: 1
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun  compatible:
18*4882a593Smuzhiyun    const: allwinner,sun6i-a31-usb-phy
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun  reg:
21*4882a593Smuzhiyun    items:
22*4882a593Smuzhiyun      - description: PHY Control registers
23*4882a593Smuzhiyun      - description: PHY PMU1 registers
24*4882a593Smuzhiyun      - description: PHY PMU2 registers
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun  reg-names:
27*4882a593Smuzhiyun    items:
28*4882a593Smuzhiyun      - const: phy_ctrl
29*4882a593Smuzhiyun      - const: pmu1
30*4882a593Smuzhiyun      - const: pmu2
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  clocks:
33*4882a593Smuzhiyun    items:
34*4882a593Smuzhiyun      - description: USB OTG PHY bus clock
35*4882a593Smuzhiyun      - description: USB Host 0 PHY bus clock
36*4882a593Smuzhiyun      - description: USB Host 1 PHY bus clock
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun  clock-names:
39*4882a593Smuzhiyun    items:
40*4882a593Smuzhiyun      - const: usb0_phy
41*4882a593Smuzhiyun      - const: usb1_phy
42*4882a593Smuzhiyun      - const: usb2_phy
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun  resets:
45*4882a593Smuzhiyun    items:
46*4882a593Smuzhiyun      - description: USB OTG reset
47*4882a593Smuzhiyun      - description: USB Host 1 Controller reset
48*4882a593Smuzhiyun      - description: USB Host 2 Controller reset
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun  reset-names:
51*4882a593Smuzhiyun    items:
52*4882a593Smuzhiyun      - const: usb0_reset
53*4882a593Smuzhiyun      - const: usb1_reset
54*4882a593Smuzhiyun      - const: usb2_reset
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun  usb0_id_det-gpios:
57*4882a593Smuzhiyun    description: GPIO to the USB OTG ID pin
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun  usb0_vbus_det-gpios:
60*4882a593Smuzhiyun    description: GPIO to the USB OTG VBUS detect pin
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun  usb0_vbus_power-supply:
63*4882a593Smuzhiyun    description: Power supply to detect the USB OTG VBUS
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun  usb0_vbus-supply:
66*4882a593Smuzhiyun    description: Regulator controlling USB OTG VBUS
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun  usb1_vbus-supply:
69*4882a593Smuzhiyun    description: Regulator controlling USB1 Host controller
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun  usb2_vbus-supply:
72*4882a593Smuzhiyun    description: Regulator controlling USB2 Host controller
73*4882a593Smuzhiyun
74*4882a593Smuzhiyunrequired:
75*4882a593Smuzhiyun  - "#phy-cells"
76*4882a593Smuzhiyun  - compatible
77*4882a593Smuzhiyun  - clocks
78*4882a593Smuzhiyun  - clock-names
79*4882a593Smuzhiyun  - reg
80*4882a593Smuzhiyun  - reg-names
81*4882a593Smuzhiyun  - resets
82*4882a593Smuzhiyun  - reset-names
83*4882a593Smuzhiyun
84*4882a593SmuzhiyunadditionalProperties: false
85*4882a593Smuzhiyun
86*4882a593Smuzhiyunexamples:
87*4882a593Smuzhiyun  - |
88*4882a593Smuzhiyun    #include <dt-bindings/gpio/gpio.h>
89*4882a593Smuzhiyun    #include <dt-bindings/clock/sun6i-a31-ccu.h>
90*4882a593Smuzhiyun    #include <dt-bindings/reset/sun6i-a31-ccu.h>
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun    phy@1c19400 {
93*4882a593Smuzhiyun        #phy-cells = <1>;
94*4882a593Smuzhiyun        compatible = "allwinner,sun6i-a31-usb-phy";
95*4882a593Smuzhiyun        reg = <0x01c19400 0x10>,
96*4882a593Smuzhiyun              <0x01c1a800 0x4>,
97*4882a593Smuzhiyun              <0x01c1b800 0x4>;
98*4882a593Smuzhiyun        reg-names = "phy_ctrl",
99*4882a593Smuzhiyun                    "pmu1",
100*4882a593Smuzhiyun                    "pmu2";
101*4882a593Smuzhiyun        clocks = <&ccu CLK_USB_PHY0>,
102*4882a593Smuzhiyun                 <&ccu CLK_USB_PHY1>,
103*4882a593Smuzhiyun                 <&ccu CLK_USB_PHY2>;
104*4882a593Smuzhiyun        clock-names = "usb0_phy",
105*4882a593Smuzhiyun                      "usb1_phy",
106*4882a593Smuzhiyun                      "usb2_phy";
107*4882a593Smuzhiyun        resets = <&ccu RST_USB_PHY0>,
108*4882a593Smuzhiyun                 <&ccu RST_USB_PHY1>,
109*4882a593Smuzhiyun                 <&ccu RST_USB_PHY2>;
110*4882a593Smuzhiyun        reset-names = "usb0_reset",
111*4882a593Smuzhiyun                      "usb1_reset",
112*4882a593Smuzhiyun                      "usb2_reset";
113*4882a593Smuzhiyun        usb0_id_det-gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
114*4882a593Smuzhiyun        usb0_vbus_det-gpios = <&pio 0 16 GPIO_ACTIVE_HIGH>; /* PA16 */
115*4882a593Smuzhiyun        usb0_vbus_power-supply = <&usb_power_supply>;
116*4882a593Smuzhiyun        usb0_vbus-supply = <&reg_drivevbus>;
117*4882a593Smuzhiyun        usb1_vbus-supply = <&reg_usb1_vbus>;
118*4882a593Smuzhiyun        usb2_vbus-supply = <&reg_usb2_vbus>;
119*4882a593Smuzhiyun    };
120