1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/perf/fsl-imx-ddr.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Freescale(NXP) IMX8 DDR performance monitor 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Frank Li <frank.li@nxp.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunproperties: 13*4882a593Smuzhiyun compatible: 14*4882a593Smuzhiyun oneOf: 15*4882a593Smuzhiyun - enum: 16*4882a593Smuzhiyun - fsl,imx8-ddr-pmu 17*4882a593Smuzhiyun - fsl,imx8m-ddr-pmu 18*4882a593Smuzhiyun - fsl,imx8mp-ddr-pmu 19*4882a593Smuzhiyun - items: 20*4882a593Smuzhiyun - enum: 21*4882a593Smuzhiyun - fsl,imx8mm-ddr-pmu 22*4882a593Smuzhiyun - fsl,imx8mn-ddr-pmu 23*4882a593Smuzhiyun - fsl,imx8mq-ddr-pmu 24*4882a593Smuzhiyun - fsl,imx8mp-ddr-pmu 25*4882a593Smuzhiyun - const: fsl,imx8m-ddr-pmu 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun reg: 28*4882a593Smuzhiyun maxItems: 1 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun interrupts: 31*4882a593Smuzhiyun maxItems: 1 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunrequired: 34*4882a593Smuzhiyun - compatible 35*4882a593Smuzhiyun - reg 36*4882a593Smuzhiyun - interrupts 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunadditionalProperties: false 39*4882a593Smuzhiyun 40*4882a593Smuzhiyunexamples: 41*4882a593Smuzhiyun - | 42*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun ddr-pmu@5c020000 { 45*4882a593Smuzhiyun compatible = "fsl,imx8-ddr-pmu"; 46*4882a593Smuzhiyun reg = <0x5c020000 0x10000>; 47*4882a593Smuzhiyun interrupt-parent = <&gic>; 48*4882a593Smuzhiyun interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 49*4882a593Smuzhiyun }; 50