1*4882a593Smuzhiyun* APM X-Gene SoC PMU bindings 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis is APM X-Gene SoC PMU (Performance Monitoring Unit) module. 4*4882a593SmuzhiyunThe following PMU devices are supported: 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun L3C - L3 cache controller 7*4882a593Smuzhiyun IOB - IO bridge 8*4882a593Smuzhiyun MCB - Memory controller bridge 9*4882a593Smuzhiyun MC - Memory controller 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunThe following section describes the SoC PMU DT node binding. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunRequired properties: 14*4882a593Smuzhiyun- compatible : Shall be "apm,xgene-pmu" for revision 1 or 15*4882a593Smuzhiyun "apm,xgene-pmu-v2" for revision 2. 16*4882a593Smuzhiyun- regmap-csw : Regmap of the CPU switch fabric (CSW) resource. 17*4882a593Smuzhiyun- regmap-mcba : Regmap of the MCB-A (memory bridge) resource. 18*4882a593Smuzhiyun- regmap-mcbb : Regmap of the MCB-B (memory bridge) resource. 19*4882a593Smuzhiyun- reg : First resource shall be the CPU bus PMU resource. 20*4882a593Smuzhiyun- interrupts : Interrupt-specifier for PMU IRQ. 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunRequired properties for L3C subnode: 23*4882a593Smuzhiyun- compatible : Shall be "apm,xgene-pmu-l3c". 24*4882a593Smuzhiyun- reg : First resource shall be the L3C PMU resource. 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunRequired properties for IOB subnode: 27*4882a593Smuzhiyun- compatible : Shall be "apm,xgene-pmu-iob". 28*4882a593Smuzhiyun- reg : First resource shall be the IOB PMU resource. 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunRequired properties for MCB subnode: 31*4882a593Smuzhiyun- compatible : Shall be "apm,xgene-pmu-mcb". 32*4882a593Smuzhiyun- reg : First resource shall be the MCB PMU resource. 33*4882a593Smuzhiyun- enable-bit-index : The bit indicates if the according MCB is enabled. 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunRequired properties for MC subnode: 36*4882a593Smuzhiyun- compatible : Shall be "apm,xgene-pmu-mc". 37*4882a593Smuzhiyun- reg : First resource shall be the MC PMU resource. 38*4882a593Smuzhiyun- enable-bit-index : The bit indicates if the according MC is enabled. 39*4882a593Smuzhiyun 40*4882a593SmuzhiyunExample: 41*4882a593Smuzhiyun csw: csw@7e200000 { 42*4882a593Smuzhiyun compatible = "apm,xgene-csw", "syscon"; 43*4882a593Smuzhiyun reg = <0x0 0x7e200000 0x0 0x1000>; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun mcba: mcba@7e700000 { 47*4882a593Smuzhiyun compatible = "apm,xgene-mcb", "syscon"; 48*4882a593Smuzhiyun reg = <0x0 0x7e700000 0x0 0x1000>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun mcbb: mcbb@7e720000 { 52*4882a593Smuzhiyun compatible = "apm,xgene-mcb", "syscon"; 53*4882a593Smuzhiyun reg = <0x0 0x7e720000 0x0 0x1000>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun pmu: pmu@78810000 { 57*4882a593Smuzhiyun compatible = "apm,xgene-pmu-v2"; 58*4882a593Smuzhiyun #address-cells = <2>; 59*4882a593Smuzhiyun #size-cells = <2>; 60*4882a593Smuzhiyun ranges; 61*4882a593Smuzhiyun regmap-csw = <&csw>; 62*4882a593Smuzhiyun regmap-mcba = <&mcba>; 63*4882a593Smuzhiyun regmap-mcbb = <&mcbb>; 64*4882a593Smuzhiyun reg = <0x0 0x78810000 0x0 0x1000>; 65*4882a593Smuzhiyun interrupts = <0x0 0x22 0x4>; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun pmul3c@7e610000 { 68*4882a593Smuzhiyun compatible = "apm,xgene-pmu-l3c"; 69*4882a593Smuzhiyun reg = <0x0 0x7e610000 0x0 0x1000>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun pmuiob@7e940000 { 73*4882a593Smuzhiyun compatible = "apm,xgene-pmu-iob"; 74*4882a593Smuzhiyun reg = <0x0 0x7e940000 0x0 0x1000>; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun pmucmcb@7e710000 { 78*4882a593Smuzhiyun compatible = "apm,xgene-pmu-mcb"; 79*4882a593Smuzhiyun reg = <0x0 0x7e710000 0x0 0x1000>; 80*4882a593Smuzhiyun enable-bit-index = <0>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun pmucmcb@7e730000 { 84*4882a593Smuzhiyun compatible = "apm,xgene-pmu-mcb"; 85*4882a593Smuzhiyun reg = <0x0 0x7e730000 0x0 0x1000>; 86*4882a593Smuzhiyun enable-bit-index = <1>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun pmucmc@7e810000 { 90*4882a593Smuzhiyun compatible = "apm,xgene-pmu-mc"; 91*4882a593Smuzhiyun reg = <0x0 0x7e810000 0x0 0x1000>; 92*4882a593Smuzhiyun enable-bit-index = <0>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun pmucmc@7e850000 { 96*4882a593Smuzhiyun compatible = "apm,xgene-pmu-mc"; 97*4882a593Smuzhiyun reg = <0x0 0x7e850000 0x0 0x1000>; 98*4882a593Smuzhiyun enable-bit-index = <1>; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun pmucmc@7e890000 { 102*4882a593Smuzhiyun compatible = "apm,xgene-pmu-mc"; 103*4882a593Smuzhiyun reg = <0x0 0x7e890000 0x0 0x1000>; 104*4882a593Smuzhiyun enable-bit-index = <2>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun pmucmc@7e8d0000 { 108*4882a593Smuzhiyun compatible = "apm,xgene-pmu-mc"; 109*4882a593Smuzhiyun reg = <0x0 0x7e8d0000 0x0 0x1000>; 110*4882a593Smuzhiyun enable-bit-index = <3>; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun }; 113