1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/opp/allwinner,sun50i-h6-operating-points.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Allwinner H6 CPU OPP Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Chen-Yu Tsai <wens@csie.org>
11*4882a593Smuzhiyun  - Maxime Ripard <mripard@kernel.org>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyundescription: |
14*4882a593Smuzhiyun  For some SoCs, the CPU frequency subset and voltage value of each
15*4882a593Smuzhiyun  OPP varies based on the silicon variant in use. Allwinner Process
16*4882a593Smuzhiyun  Voltage Scaling Tables defines the voltage and frequency value based
17*4882a593Smuzhiyun  on the speedbin blown in the efuse combination. The
18*4882a593Smuzhiyun  sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to
19*4882a593Smuzhiyun  provide the OPP framework with required information.
20*4882a593Smuzhiyun
21*4882a593Smuzhiyunproperties:
22*4882a593Smuzhiyun  compatible:
23*4882a593Smuzhiyun    const: allwinner,sun50i-h6-operating-points
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun  nvmem-cells:
26*4882a593Smuzhiyun    description: |
27*4882a593Smuzhiyun      A phandle pointing to a nvmem-cells node representing the efuse
28*4882a593Smuzhiyun      registers that has information about the speedbin that is used
29*4882a593Smuzhiyun      to select the right frequency/voltage value pair. Please refer
30*4882a593Smuzhiyun      the for nvmem-cells bindings
31*4882a593Smuzhiyun      Documentation/devicetree/bindings/nvmem/nvmem.txt and also
32*4882a593Smuzhiyun      examples below.
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun  opp-shared: true
35*4882a593Smuzhiyun
36*4882a593Smuzhiyunrequired:
37*4882a593Smuzhiyun  - compatible
38*4882a593Smuzhiyun  - nvmem-cells
39*4882a593Smuzhiyun
40*4882a593SmuzhiyunpatternProperties:
41*4882a593Smuzhiyun  "opp-[0-9]+":
42*4882a593Smuzhiyun    type: object
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun    properties:
45*4882a593Smuzhiyun      opp-hz: true
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun    patternProperties:
48*4882a593Smuzhiyun      "opp-microvolt-.*": true
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun    required:
51*4882a593Smuzhiyun      - opp-hz
52*4882a593Smuzhiyun      - opp-microvolt-speed0
53*4882a593Smuzhiyun      - opp-microvolt-speed1
54*4882a593Smuzhiyun      - opp-microvolt-speed2
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun    unevaluatedProperties: false
57*4882a593Smuzhiyun
58*4882a593SmuzhiyunadditionalProperties: false
59*4882a593Smuzhiyun
60*4882a593Smuzhiyunexamples:
61*4882a593Smuzhiyun  - |
62*4882a593Smuzhiyun    cpu_opp_table: opp-table {
63*4882a593Smuzhiyun        compatible = "allwinner,sun50i-h6-operating-points";
64*4882a593Smuzhiyun        nvmem-cells = <&speedbin_efuse>;
65*4882a593Smuzhiyun        opp-shared;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun        opp-480000000 {
68*4882a593Smuzhiyun            clock-latency-ns = <244144>; /* 8 32k periods */
69*4882a593Smuzhiyun            opp-hz = /bits/ 64 <480000000>;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun            opp-microvolt-speed0 = <880000>;
72*4882a593Smuzhiyun            opp-microvolt-speed1 = <820000>;
73*4882a593Smuzhiyun            opp-microvolt-speed2 = <800000>;
74*4882a593Smuzhiyun        };
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun        opp-720000000 {
77*4882a593Smuzhiyun            clock-latency-ns = <244144>; /* 8 32k periods */
78*4882a593Smuzhiyun            opp-hz = /bits/ 64 <720000000>;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun            opp-microvolt-speed0 = <880000>;
81*4882a593Smuzhiyun            opp-microvolt-speed1 = <820000>;
82*4882a593Smuzhiyun            opp-microvolt-speed2 = <800000>;
83*4882a593Smuzhiyun        };
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun        opp-816000000 {
86*4882a593Smuzhiyun            clock-latency-ns = <244144>; /* 8 32k periods */
87*4882a593Smuzhiyun            opp-hz = /bits/ 64 <816000000>;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun            opp-microvolt-speed0 = <880000>;
90*4882a593Smuzhiyun            opp-microvolt-speed1 = <820000>;
91*4882a593Smuzhiyun            opp-microvolt-speed2 = <800000>;
92*4882a593Smuzhiyun        };
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun        opp-888000000 {
95*4882a593Smuzhiyun            clock-latency-ns = <244144>; /* 8 32k periods */
96*4882a593Smuzhiyun            opp-hz = /bits/ 64 <888000000>;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun            opp-microvolt-speed0 = <940000>;
99*4882a593Smuzhiyun            opp-microvolt-speed1 = <820000>;
100*4882a593Smuzhiyun            opp-microvolt-speed2 = <800000>;
101*4882a593Smuzhiyun        };
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun        opp-1080000000 {
104*4882a593Smuzhiyun            clock-latency-ns = <244144>; /* 8 32k periods */
105*4882a593Smuzhiyun            opp-hz = /bits/ 64 <1080000000>;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun            opp-microvolt-speed0 = <1060000>;
108*4882a593Smuzhiyun            opp-microvolt-speed1 = <880000>;
109*4882a593Smuzhiyun            opp-microvolt-speed2 = <840000>;
110*4882a593Smuzhiyun        };
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun        opp-1320000000 {
113*4882a593Smuzhiyun            clock-latency-ns = <244144>; /* 8 32k periods */
114*4882a593Smuzhiyun            opp-hz = /bits/ 64 <1320000000>;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun            opp-microvolt-speed0 = <1160000>;
117*4882a593Smuzhiyun            opp-microvolt-speed1 = <940000>;
118*4882a593Smuzhiyun            opp-microvolt-speed2 = <900000>;
119*4882a593Smuzhiyun        };
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun        opp-1488000000 {
122*4882a593Smuzhiyun            clock-latency-ns = <244144>; /* 8 32k periods */
123*4882a593Smuzhiyun            opp-hz = /bits/ 64 <1488000000>;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun            opp-microvolt-speed0 = <1160000>;
126*4882a593Smuzhiyun            opp-microvolt-speed1 = <1000000>;
127*4882a593Smuzhiyun            opp-microvolt-speed2 = <960000>;
128*4882a593Smuzhiyun        };
129*4882a593Smuzhiyun    };
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun...
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