1*4882a593Smuzhiyun* Wiznet w5x00 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis is a standalone 10/100 MBit Ethernet controller with SPI interface. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunFor each device connected to a SPI bus, define a child node within 6*4882a593Smuzhiyunthe SPI master node. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun- compatible: Should be one of the following strings: 10*4882a593Smuzhiyun "wiznet,w5100" 11*4882a593Smuzhiyun "wiznet,w5200" 12*4882a593Smuzhiyun "wiznet,w5500" 13*4882a593Smuzhiyun- reg: Specify the SPI chip select the chip is wired to. 14*4882a593Smuzhiyun- interrupts: Specify the interrupt index within the interrupt controller (referred 15*4882a593Smuzhiyun to above in interrupt-parent) and interrupt type. w5x00 natively 16*4882a593Smuzhiyun generates falling edge interrupts, however, additional board logic 17*4882a593Smuzhiyun might invert the signal. 18*4882a593Smuzhiyun- pinctrl-names: List of assigned state names, see pinctrl binding documentation. 19*4882a593Smuzhiyun- pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line, 20*4882a593Smuzhiyun see also generic and your platform specific pinctrl binding 21*4882a593Smuzhiyun documentation. 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunOptional properties: 24*4882a593Smuzhiyun- spi-max-frequency: Maximum frequency of the SPI bus when accessing the w5500. 25*4882a593Smuzhiyun According to the w5500 datasheet, the chip allows a maximum of 80 MHz, however, 26*4882a593Smuzhiyun board designs may need to limit this value. 27*4882a593Smuzhiyun- local-mac-address: See ethernet.txt in the same directory. 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunExample (for Raspberry Pi with pin control stuff for GPIO irq): 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun&spi { 33*4882a593Smuzhiyun ethernet@0: w5500@0 { 34*4882a593Smuzhiyun compatible = "wiznet,w5500"; 35*4882a593Smuzhiyun reg = <0>; 36*4882a593Smuzhiyun pinctrl-names = "default"; 37*4882a593Smuzhiyun pinctrl-0 = <ð1_pins>; 38*4882a593Smuzhiyun interrupt-parent = <&gpio>; 39*4882a593Smuzhiyun interrupts = <25 IRQ_TYPE_EDGE_FALLING>; 40*4882a593Smuzhiyun spi-max-frequency = <30000000>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun}; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun&gpio { 45*4882a593Smuzhiyun eth1_pins: eth1_pins { 46*4882a593Smuzhiyun brcm,pins = <25>; 47*4882a593Smuzhiyun brcm,function = <0>; /* in */ 48*4882a593Smuzhiyun brcm,pull = <0>; /* none */ 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun}; 51