1*4882a593Smuzhiyun* Qualcomm Atheros ath9k wireless devices 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis node provides properties for configuring the ath9k wireless device. The 4*4882a593Smuzhiyunnode is expected to be specified as a child node of the PCI controller to 5*4882a593Smuzhiyunwhich the wireless chip is connected. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun- compatible: For PCI and PCIe devices this should be an identifier following 9*4882a593Smuzhiyun the format as defined in "PCI Bus Binding to Open Firmware" 10*4882a593Smuzhiyun Revision 2.1. One of the possible formats is "pciVVVV,DDDD" 11*4882a593Smuzhiyun where VVVV is the PCI vendor ID and DDDD is PCI device ID. 12*4882a593Smuzhiyun Typically QCA's PCI vendor ID 168c is used while the PCI device 13*4882a593Smuzhiyun ID depends on the chipset - see the following (possibly 14*4882a593Smuzhiyun incomplete) list: 15*4882a593Smuzhiyun - 0023 for AR5416 16*4882a593Smuzhiyun - 0024 for AR5418 17*4882a593Smuzhiyun - 0027 for AR9160 18*4882a593Smuzhiyun - 0029 for AR9220 and AR9223 19*4882a593Smuzhiyun - 002a for AR9280 and AR9283 20*4882a593Smuzhiyun - 002b for AR9285 21*4882a593Smuzhiyun - 002c for AR2427 22*4882a593Smuzhiyun - 002d for AR9227 23*4882a593Smuzhiyun - 002e for AR9287 24*4882a593Smuzhiyun - 0030 for AR9380, AR9381 and AR9382 25*4882a593Smuzhiyun - 0032 for AR9485 26*4882a593Smuzhiyun - 0033 for AR9580 and AR9590 27*4882a593Smuzhiyun - 0034 for AR9462 28*4882a593Smuzhiyun - 0036 for AR9565 29*4882a593Smuzhiyun - 0037 for AR9485 30*4882a593Smuzhiyun- reg: Address and length of the register set for the device. 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunOptional properties: 33*4882a593Smuzhiyun- qca,no-eeprom: Indicates that there is no physical EEPROM connected to the 34*4882a593Smuzhiyun ath9k wireless chip (in this case the calibration / 35*4882a593Smuzhiyun EEPROM data will be loaded from userspace using the 36*4882a593Smuzhiyun kernel firmware loader). 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunThe MAC address will be determined using the optional properties defined in 39*4882a593Smuzhiyunnet/ethernet.txt. 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunIn this example, the node is defined as child node of the PCI controller: 42*4882a593Smuzhiyun&pci0 { 43*4882a593Smuzhiyun wifi@168c,002d { 44*4882a593Smuzhiyun compatible = "pci168c,002d"; 45*4882a593Smuzhiyun reg = <0x7000 0 0 0 0x1000>; 46*4882a593Smuzhiyun qca,no-eeprom; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun}; 49