1*4882a593SmuzhiyunMarvell 8787/8897/8997 (sd8787/sd8897/sd8997/pcie8997) SDIO/PCIE devices 2*4882a593Smuzhiyun------ 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThis node provides properties for controlling the Marvell SDIO/PCIE wireless device. 5*4882a593SmuzhiyunThe node is expected to be specified as a child node to the SDIO/PCIE controller that 6*4882a593Smuzhiyunconnects the device to the system. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun - compatible : should be one of the following: 11*4882a593Smuzhiyun * "marvell,sd8787" 12*4882a593Smuzhiyun * "marvell,sd8897" 13*4882a593Smuzhiyun * "marvell,sd8997" 14*4882a593Smuzhiyun * "pci11ab,2b42" 15*4882a593Smuzhiyun * "pci1b4b,2b42" 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunOptional properties: 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun - marvell,caldata* : A series of properties with marvell,caldata prefix, 20*4882a593Smuzhiyun represent calibration data downloaded to the device during 21*4882a593Smuzhiyun initialization. This is an array of unsigned 8-bit values. 22*4882a593Smuzhiyun the properties should follow below property name and 23*4882a593Smuzhiyun corresponding array length: 24*4882a593Smuzhiyun "marvell,caldata-txpwrlimit-2g" (length = 566). 25*4882a593Smuzhiyun "marvell,caldata-txpwrlimit-5g-sub0" (length = 502). 26*4882a593Smuzhiyun "marvell,caldata-txpwrlimit-5g-sub1" (length = 688). 27*4882a593Smuzhiyun "marvell,caldata-txpwrlimit-5g-sub2" (length = 750). 28*4882a593Smuzhiyun "marvell,caldata-txpwrlimit-5g-sub3" (length = 502). 29*4882a593Smuzhiyun - marvell,wakeup-pin : a wakeup pin number of wifi chip which will be configured 30*4882a593Smuzhiyun to firmware. Firmware will wakeup the host using this pin 31*4882a593Smuzhiyun during suspend/resume. 32*4882a593Smuzhiyun - interrupts : interrupt pin number to the cpu. driver will request an irq based on 33*4882a593Smuzhiyun this interrupt number. during system suspend, the irq will be enabled 34*4882a593Smuzhiyun so that the wifi chip can wakeup host platform under certain condition. 35*4882a593Smuzhiyun during system resume, the irq will be disabled to make sure 36*4882a593Smuzhiyun unnecessary interrupt is not received. 37*4882a593Smuzhiyun - vmmc-supply: a phandle of a regulator, supplying VCC to the card 38*4882a593Smuzhiyun - mmc-pwrseq: phandle to the MMC power sequence node. See "mmc-pwrseq-*" 39*4882a593Smuzhiyun for documentation of MMC power sequence bindings. 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunExample: 42*4882a593Smuzhiyun 43*4882a593SmuzhiyunTx power limit calibration data is configured in below example. 44*4882a593SmuzhiyunThe calibration data is an array of unsigned values, the length 45*4882a593Smuzhiyuncan vary between hw versions. 46*4882a593SmuzhiyunIRQ pin 38 is used as system wakeup source interrupt. wakeup pin 3 is configured 47*4882a593Smuzhiyunso that firmware can wakeup host using this device side pin. 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun&mmc3 { 50*4882a593Smuzhiyun vmmc-supply = <&wlan_en_reg>; 51*4882a593Smuzhiyun mmc-pwrseq = <&wifi_pwrseq>; 52*4882a593Smuzhiyun bus-width = <4>; 53*4882a593Smuzhiyun cap-power-off-card; 54*4882a593Smuzhiyun keep-power-in-suspend; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #address-cells = <1>; 57*4882a593Smuzhiyun #size-cells = <0>; 58*4882a593Smuzhiyun mwifiex: wifi@1 { 59*4882a593Smuzhiyun compatible = "marvell,sd8897"; 60*4882a593Smuzhiyun reg = <1>; 61*4882a593Smuzhiyun interrupt-parent = <&pio>; 62*4882a593Smuzhiyun interrupts = <38 IRQ_TYPE_LEVEL_LOW>; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun marvell,caldata_00_txpwrlimit_2g_cfg_set = /bits/ 8 < 65*4882a593Smuzhiyun 0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01>; 66*4882a593Smuzhiyun marvell,wakeup-pin = <3>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun}; 69