1*4882a593Smuzhiyun* Socionext NetSec Ethernet Controller IP 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Should be "socionext,synquacer-netsec" 5*4882a593Smuzhiyun- reg: Address and length of the control register area, followed by the 6*4882a593Smuzhiyun address and length of the EEPROM holding the MAC address and 7*4882a593Smuzhiyun microengine firmware 8*4882a593Smuzhiyun- interrupts: Should contain ethernet controller interrupt 9*4882a593Smuzhiyun- clocks: phandle to the PHY reference clock 10*4882a593Smuzhiyun- clock-names: Should be "phy_ref_clk" 11*4882a593Smuzhiyun- phy-mode: See ethernet.txt file in the same directory 12*4882a593Smuzhiyun- phy-handle: See ethernet.txt in the same directory. 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun- mdio device tree subnode: When the Netsec has a phy connected to its local 15*4882a593Smuzhiyun mdio, there must be device tree subnode with the following 16*4882a593Smuzhiyun required properties: 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun - #address-cells: Must be <1>. 19*4882a593Smuzhiyun - #size-cells: Must be <0>. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun For each phy on the mdio bus, there must be a node with the following 22*4882a593Smuzhiyun fields: 23*4882a593Smuzhiyun - compatible: Refer to phy.txt 24*4882a593Smuzhiyun - reg: phy id used to communicate to phy. 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunOptional properties: (See ethernet.txt file in the same directory) 27*4882a593Smuzhiyun- dma-coherent: Boolean property, must only be present if memory 28*4882a593Smuzhiyun accesses performed by the device are cache coherent. 29*4882a593Smuzhiyun- max-speed: See ethernet.txt in the same directory. 30*4882a593Smuzhiyun- max-frame-size: See ethernet.txt in the same directory. 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunThe MAC address will be determined using the optional properties 33*4882a593Smuzhiyundefined in ethernet.txt. The 'phy-mode' property is required, but may 34*4882a593Smuzhiyunbe set to the empty string if the PHY configuration is programmed by 35*4882a593Smuzhiyunthe firmware or set by hardware straps, and needs to be preserved. 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunExample: 38*4882a593Smuzhiyun eth0: ethernet@522d0000 { 39*4882a593Smuzhiyun compatible = "socionext,synquacer-netsec"; 40*4882a593Smuzhiyun reg = <0 0x522d0000 0x0 0x10000>, <0 0x10000000 0x0 0x10000>; 41*4882a593Smuzhiyun interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 42*4882a593Smuzhiyun clocks = <&clk_netsec>; 43*4882a593Smuzhiyun clock-names = "phy_ref_clk"; 44*4882a593Smuzhiyun phy-mode = "rgmii"; 45*4882a593Smuzhiyun max-speed = <1000>; 46*4882a593Smuzhiyun max-frame-size = <9000>; 47*4882a593Smuzhiyun phy-handle = <&phy1>; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun mdio { 50*4882a593Smuzhiyun #address-cells = <1>; 51*4882a593Smuzhiyun #size-cells = <0>; 52*4882a593Smuzhiyun phy1: ethernet-phy@1 { 53*4882a593Smuzhiyun compatible = "ethernet-phy-ieee802.3-c22"; 54*4882a593Smuzhiyun reg = <1>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun }; 57