xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/nixge.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* NI XGE Ethernet controller
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunRequired properties:
4*4882a593Smuzhiyun- compatible: Should be "ni,xge-enet-3.00", but can be "ni,xge-enet-2.00" for
5*4882a593Smuzhiyun              older device trees with DMA engines co-located in the address map,
6*4882a593Smuzhiyun              with the one reg entry to describe the whole device.
7*4882a593Smuzhiyun- reg: Address and length of the register set for the device. It contains the
8*4882a593Smuzhiyun       information of registers in the same order as described by reg-names.
9*4882a593Smuzhiyun- reg-names: Should contain the reg names
10*4882a593Smuzhiyun	"dma":  DMA engine control and status region
11*4882a593Smuzhiyun        "ctrl": MDIO and PHY control and status region
12*4882a593Smuzhiyun- interrupts: Should contain tx and rx interrupt
13*4882a593Smuzhiyun- interrupt-names: Should be "rx" and "tx"
14*4882a593Smuzhiyun- phy-mode: See ethernet.txt file in the same directory.
15*4882a593Smuzhiyun- nvmem-cells: Phandle of nvmem cell containing the MAC address
16*4882a593Smuzhiyun- nvmem-cell-names: Should be "address"
17*4882a593Smuzhiyun
18*4882a593SmuzhiyunOptional properties:
19*4882a593Smuzhiyun- mdio subnode to indicate presence of MDIO controller
20*4882a593Smuzhiyun- fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
21*4882a593Smuzhiyun  Use instead of phy-handle.
22*4882a593Smuzhiyun- phy-handle: See ethernet.txt file in the same directory.
23*4882a593Smuzhiyun
24*4882a593SmuzhiyunExamples (10G generic PHY):
25*4882a593Smuzhiyun	nixge0: ethernet@40000000 {
26*4882a593Smuzhiyun		compatible = "ni,xge-enet-3.00";
27*4882a593Smuzhiyun		reg = <0x40000000 0x4000
28*4882a593Smuzhiyun		       0x41002000 0x2000>;
29*4882a593Smuzhiyun		reg-names = "dma", "ctrl";
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun		nvmem-cells = <&eth1_addr>;
32*4882a593Smuzhiyun		nvmem-cell-names = "address";
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun		interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>, <0 30 IRQ_TYPE_LEVEL_HIGH>;
35*4882a593Smuzhiyun		interrupt-names = "rx", "tx";
36*4882a593Smuzhiyun		interrupt-parent = <&intc>;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		phy-mode = "xgmii";
39*4882a593Smuzhiyun		phy-handle = <&ethernet_phy1>;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun		mdio {
42*4882a593Smuzhiyun			ethernet_phy1: ethernet-phy@4 {
43*4882a593Smuzhiyun				compatible = "ethernet-phy-ieee802.3-c45";
44*4882a593Smuzhiyun				reg = <4>;
45*4882a593Smuzhiyun			};
46*4882a593Smuzhiyun		};
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun
49*4882a593SmuzhiyunExamples (10G generic PHY, no MDIO):
50*4882a593Smuzhiyun	nixge0: ethernet@40000000 {
51*4882a593Smuzhiyun		compatible = "ni,xge-enet-2.00";
52*4882a593Smuzhiyun		reg = <0x40000000 0x6000>;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		nvmem-cells = <&eth1_addr>;
55*4882a593Smuzhiyun		nvmem-cell-names = "address";
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun		interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>, <0 30 IRQ_TYPE_LEVEL_HIGH>;
58*4882a593Smuzhiyun		interrupt-names = "rx", "tx";
59*4882a593Smuzhiyun		interrupt-parent = <&intc>;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun		phy-mode = "xgmii";
62*4882a593Smuzhiyun		phy-handle = <&ethernet_phy1>;
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593SmuzhiyunExamples (1G generic fixed-link + MDIO):
66*4882a593Smuzhiyun	nixge0: ethernet@40000000 {
67*4882a593Smuzhiyun		compatible = "ni,xge-enet-2.00";
68*4882a593Smuzhiyun		reg = <0x40000000 0x6000>;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun		nvmem-cells = <&eth1_addr>;
71*4882a593Smuzhiyun		nvmem-cell-names = "address";
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun		interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>, <0 30 IRQ_TYPE_LEVEL_HIGH>;
74*4882a593Smuzhiyun		interrupt-names = "rx", "tx";
75*4882a593Smuzhiyun		interrupt-parent = <&intc>;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun		phy-mode = "xgmii";
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun		fixed-link {
80*4882a593Smuzhiyun			speed = <1000>;
81*4882a593Smuzhiyun			pause;
82*4882a593Smuzhiyun			link-gpios = <&gpio0 63 GPIO_ACTIVE_HIGH>;
83*4882a593Smuzhiyun		};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun		mdio {
86*4882a593Smuzhiyun			ethernet_phy1: ethernet-phy@4 {
87*4882a593Smuzhiyun				compatible = "ethernet-phy-ieee802.3-c22";
88*4882a593Smuzhiyun				reg = <4>;
89*4882a593Smuzhiyun			};
90*4882a593Smuzhiyun		};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun	};
93