1*4882a593SmuzhiyunMediaTek SoC built-in Bluetooth Devices 2*4882a593Smuzhiyun================================== 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThis device is a serial attached device to BTIF device and thus it must be a 5*4882a593Smuzhiyunchild node of the serial node with BTIF. The dt-bindings details for BTIF 6*4882a593Smuzhiyundevice can be known via Documentation/devicetree/bindings/serial/8250.yaml. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunRequired properties: 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun- compatible: Must be 11*4882a593Smuzhiyun "mediatek,mt7622-bluetooth": for MT7622 SoC 12*4882a593Smuzhiyun- clocks: Should be the clock specifiers corresponding to the entry in 13*4882a593Smuzhiyun clock-names property. 14*4882a593Smuzhiyun- clock-names: Should contain "ref" entries. 15*4882a593Smuzhiyun- power-domains: Phandle to the power domain that the device is part of 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunExample: 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun btif: serial@1100c000 { 20*4882a593Smuzhiyun compatible = "mediatek,mt7622-btif", 21*4882a593Smuzhiyun "mediatek,mtk-btif"; 22*4882a593Smuzhiyun reg = <0 0x1100c000 0 0x1000>; 23*4882a593Smuzhiyun interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_LOW>; 24*4882a593Smuzhiyun clocks = <&pericfg CLK_PERI_BTIF_PD>; 25*4882a593Smuzhiyun clock-names = "main"; 26*4882a593Smuzhiyun reg-shift = <2>; 27*4882a593Smuzhiyun reg-io-width = <4>; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun bluetooth { 30*4882a593Smuzhiyun compatible = "mediatek,mt7622-bluetooth"; 31*4882a593Smuzhiyun power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>; 32*4882a593Smuzhiyun clocks = <&clk25m>; 33*4882a593Smuzhiyun clock-names = "ref"; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunMediaTek UART based Bluetooth Devices 38*4882a593Smuzhiyun================================== 39*4882a593Smuzhiyun 40*4882a593SmuzhiyunThis device is a serial attached device to UART device and thus it must be a 41*4882a593Smuzhiyunchild node of the serial node with UART. 42*4882a593Smuzhiyun 43*4882a593SmuzhiyunPlease refer to the following documents for generic properties: 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun Documentation/devicetree/bindings/serial/serial.yaml 46*4882a593Smuzhiyun 47*4882a593SmuzhiyunRequired properties: 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun- compatible: Must be 50*4882a593Smuzhiyun "mediatek,mt7663u-bluetooth": for MT7663U device 51*4882a593Smuzhiyun "mediatek,mt7668u-bluetooth": for MT7668U device 52*4882a593Smuzhiyun- vcc-supply: Main voltage regulator 53*4882a593Smuzhiyun 54*4882a593SmuzhiyunIf the pin controller on the platform can support both pinmux and GPIO 55*4882a593Smuzhiyuncontrol such as the most of MediaTek platform. Please use below properties. 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun- pinctrl-names: Should be "default", "runtime" 58*4882a593Smuzhiyun- pinctrl-0: Should contain UART RXD low when the device is powered up to 59*4882a593Smuzhiyun enter proper bootstrap mode. 60*4882a593Smuzhiyun- pinctrl-1: Should contain UART mode pin ctrl 61*4882a593Smuzhiyun 62*4882a593SmuzhiyunElse, the pin controller on the platform only can support pinmux control and 63*4882a593Smuzhiyunthe GPIO control still has to rely on the dedicated GPIO controller such as 64*4882a593Smuzhiyuna legacy MediaTek SoC, MT7621. Please use the below properties. 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun- boot-gpios: GPIO same to the pin as UART RXD and used to keep LOW when 67*4882a593Smuzhiyun the device is powered up to enter proper bootstrap mode when 68*4882a593Smuzhiyun- pinctrl-names: Should be "default" 69*4882a593Smuzhiyun- pinctrl-0: Should contain UART mode pin ctrl 70*4882a593Smuzhiyun 71*4882a593SmuzhiyunOptional properties: 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun- reset-gpios: GPIO used to reset the device whose initial state keeps low, 74*4882a593Smuzhiyun if the GPIO is missing, then board-level design should be 75*4882a593Smuzhiyun guaranteed. 76*4882a593Smuzhiyun- clocks: Should be the clock specifiers corresponding to the entry in 77*4882a593Smuzhiyun clock-names property. If the clock is missing, then board-level 78*4882a593Smuzhiyun design should be guaranteed. 79*4882a593Smuzhiyun- clock-names: Should contain "osc" entry for the external oscillator. 80*4882a593Smuzhiyun- current-speed: Current baud rate of the device whose defaults to 921600 81*4882a593Smuzhiyun 82*4882a593SmuzhiyunExample: 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun uart1_pins_boot: uart1-default { 85*4882a593Smuzhiyun pins-dat { 86*4882a593Smuzhiyun pinmux = <MT7623_PIN_81_URXD1_FUNC_GPIO81>; 87*4882a593Smuzhiyun output-low; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun uart1_pins_runtime: uart1-runtime { 92*4882a593Smuzhiyun pins-dat { 93*4882a593Smuzhiyun pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>, 94*4882a593Smuzhiyun <MT7623_PIN_82_UTXD1_FUNC_UTXD1>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun uart1: serial@11003000 { 99*4882a593Smuzhiyun compatible = "mediatek,mt7623-uart", 100*4882a593Smuzhiyun "mediatek,mt6577-uart"; 101*4882a593Smuzhiyun reg = <0 0x11003000 0 0x400>; 102*4882a593Smuzhiyun interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>; 103*4882a593Smuzhiyun clocks = <&pericfg CLK_PERI_UART1_SEL>, 104*4882a593Smuzhiyun <&pericfg CLK_PERI_UART1>; 105*4882a593Smuzhiyun clock-names = "baud", "bus"; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun bluetooth { 108*4882a593Smuzhiyun compatible = "mediatek,mt7663u-bluetooth"; 109*4882a593Smuzhiyun vcc-supply = <®_5v>; 110*4882a593Smuzhiyun reset-gpios = <&pio 24 GPIO_ACTIVE_LOW>; 111*4882a593Smuzhiyun pinctrl-names = "default", "runtime"; 112*4882a593Smuzhiyun pinctrl-0 = <&uart1_pins_boot>; 113*4882a593Smuzhiyun pinctrl-1 = <&uart1_pins_runtime>; 114*4882a593Smuzhiyun current-speed = <921600>; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun }; 117