xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/mdio.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/net/mdio.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: MDIO Bus Generic Binding
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Andrew Lunn <andrew@lunn.ch>
11*4882a593Smuzhiyun  - Florian Fainelli <f.fainelli@gmail.com>
12*4882a593Smuzhiyun  - Heiner Kallweit <hkallweit1@gmail.com>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyundescription:
15*4882a593Smuzhiyun  These are generic properties that can apply to any MDIO bus. Any
16*4882a593Smuzhiyun  MDIO bus must have a list of child nodes, one per device on the
17*4882a593Smuzhiyun  bus. These should follow the generic ethernet-phy.yaml document, or
18*4882a593Smuzhiyun  a device specific binding document.
19*4882a593Smuzhiyun
20*4882a593Smuzhiyunproperties:
21*4882a593Smuzhiyun  $nodename:
22*4882a593Smuzhiyun    pattern: "^mdio(@.*)?"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun  "#address-cells":
25*4882a593Smuzhiyun    const: 1
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun  "#size-cells":
28*4882a593Smuzhiyun    const: 0
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun  reset-gpios:
31*4882a593Smuzhiyun    maxItems: 1
32*4882a593Smuzhiyun    description:
33*4882a593Smuzhiyun      The phandle and specifier for the GPIO that controls the RESET
34*4882a593Smuzhiyun      lines of all devices on that MDIO bus.
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun  reset-delay-us:
37*4882a593Smuzhiyun    description:
38*4882a593Smuzhiyun      RESET pulse width in microseconds. It applies to all MDIO devices
39*4882a593Smuzhiyun      and must therefore be appropriately determined based on all devices
40*4882a593Smuzhiyun      requirements (maximum value of all per-device RESET pulse widths).
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun  reset-post-delay-us:
43*4882a593Smuzhiyun    description:
44*4882a593Smuzhiyun      Delay after reset deassert in microseconds. It applies to all MDIO
45*4882a593Smuzhiyun      devices and it's determined by how fast all devices are ready for
46*4882a593Smuzhiyun      communication. This delay happens just before e.g. Ethernet PHY
47*4882a593Smuzhiyun      type ID auto detection.
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun  clock-frequency:
50*4882a593Smuzhiyun    description:
51*4882a593Smuzhiyun      Desired MDIO bus clock frequency in Hz. Values greater than IEEE 802.3
52*4882a593Smuzhiyun      defined 2.5MHz should only be used when all devices on the bus support
53*4882a593Smuzhiyun      the given clock speed.
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun  suppress-preamble:
56*4882a593Smuzhiyun    description:
57*4882a593Smuzhiyun      The 32 bit preamble should be suppressed. In order for this to
58*4882a593Smuzhiyun      work, all devices on the bus must support suppressed preamble.
59*4882a593Smuzhiyun    type: boolean
60*4882a593Smuzhiyun
61*4882a593SmuzhiyunpatternProperties:
62*4882a593Smuzhiyun  "^ethernet-phy@[0-9a-f]+$":
63*4882a593Smuzhiyun    type: object
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun    properties:
66*4882a593Smuzhiyun      reg:
67*4882a593Smuzhiyun        minimum: 0
68*4882a593Smuzhiyun        maximum: 31
69*4882a593Smuzhiyun        description:
70*4882a593Smuzhiyun          The ID number for the device.
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun      broken-turn-around:
73*4882a593Smuzhiyun        $ref: /schemas/types.yaml#definitions/flag
74*4882a593Smuzhiyun        description:
75*4882a593Smuzhiyun          If set, indicates the MDIO device does not correctly release
76*4882a593Smuzhiyun          the turn around line low at end of the control phase of the
77*4882a593Smuzhiyun          MDIO transaction.
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun      resets:
80*4882a593Smuzhiyun        maxItems: 1
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun      reset-names:
83*4882a593Smuzhiyun        const: phy
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun      reset-gpios:
86*4882a593Smuzhiyun        maxItems: 1
87*4882a593Smuzhiyun        description:
88*4882a593Smuzhiyun          The GPIO phandle and specifier for the MDIO reset signal.
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun      reset-assert-us:
91*4882a593Smuzhiyun        description:
92*4882a593Smuzhiyun          Delay after the reset was asserted in microseconds. If this
93*4882a593Smuzhiyun          property is missing the delay will be skipped.
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun      reset-deassert-us:
96*4882a593Smuzhiyun        description:
97*4882a593Smuzhiyun          Delay after the reset was deasserted in microseconds. If
98*4882a593Smuzhiyun          this property is missing the delay will be skipped.
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun    required:
101*4882a593Smuzhiyun      - reg
102*4882a593Smuzhiyun
103*4882a593SmuzhiyunadditionalProperties: true
104*4882a593Smuzhiyun
105*4882a593Smuzhiyunexamples:
106*4882a593Smuzhiyun  - |
107*4882a593Smuzhiyun    davinci_mdio: mdio@5c030000 {
108*4882a593Smuzhiyun        reg = <0x5c030000 0x1000>;
109*4882a593Smuzhiyun        #address-cells = <1>;
110*4882a593Smuzhiyun        #size-cells = <0>;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun        reset-gpios = <&gpio2 5 1>;
113*4882a593Smuzhiyun        reset-delay-us = <2>;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun        ethphy0: ethernet-phy@1 {
116*4882a593Smuzhiyun            reg = <1>;
117*4882a593Smuzhiyun        };
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun        ethphy1: ethernet-phy@3 {
120*4882a593Smuzhiyun            reg = <3>;
121*4882a593Smuzhiyun        };
122*4882a593Smuzhiyun    };
123