1*4882a593SmuzhiyunProperties for an MDIO bus multiplexer consumer device 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis is a special case of MDIO mux when MDIO mux is defined as a consumer 4*4882a593Smuzhiyunof a mux producer device. The mux producer can be of any type like mmio mux 5*4882a593Smuzhiyunproducer, gpio mux producer or generic register based mux producer. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties in addition to the MDIO Bus multiplexer properties: 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun- compatible : should be "mmio-mux-multiplexer" 10*4882a593Smuzhiyun- mux-controls : mux controller node to use for operating the mux 11*4882a593Smuzhiyun- mdio-parent-bus : phandle to the parent MDIO bus. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyuneach child node of mdio bus multiplexer consumer device represent a mdio 14*4882a593Smuzhiyunbus. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunfor more information please refer 17*4882a593SmuzhiyunDocumentation/devicetree/bindings/mux/mux-controller.txt 18*4882a593Smuzhiyunand Documentation/devicetree/bindings/net/mdio-mux.txt 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunExample: 21*4882a593SmuzhiyunIn below example the Mux producer and consumer are separate nodes. 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun&i2c0 { 24*4882a593Smuzhiyun fpga@66 { // fpga connected to i2c 25*4882a593Smuzhiyun compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c", 26*4882a593Smuzhiyun "simple-mfd"; 27*4882a593Smuzhiyun reg = <0x66>; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun mux: mux-controller { // Mux Producer 30*4882a593Smuzhiyun compatible = "reg-mux"; 31*4882a593Smuzhiyun #mux-control-cells = <1>; 32*4882a593Smuzhiyun mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */ 33*4882a593Smuzhiyun <0x54 0x07>; /* 1: reg 0x54, bits 2:0 */ 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun}; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyunmdio-mux-1 { // Mux consumer 39*4882a593Smuzhiyun compatible = "mdio-mux-multiplexer"; 40*4882a593Smuzhiyun mux-controls = <&mux 0>; 41*4882a593Smuzhiyun mdio-parent-bus = <&emdio1>; 42*4882a593Smuzhiyun #address-cells = <1>; 43*4882a593Smuzhiyun #size-cells = <0>; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun mdio@0 { 46*4882a593Smuzhiyun reg = <0x0>; 47*4882a593Smuzhiyun #address-cells = <1>; 48*4882a593Smuzhiyun #size-cells = <0>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun mdio@8 { 52*4882a593Smuzhiyun reg = <0x8>; 53*4882a593Smuzhiyun #address-cells = <1>; 54*4882a593Smuzhiyun #size-cells = <0>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun .. 58*4882a593Smuzhiyun .. 59*4882a593Smuzhiyun}; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyunmdio-mux-2 { // Mux consumer 62*4882a593Smuzhiyun compatible = "mdio-mux-multiplexer"; 63*4882a593Smuzhiyun mux-controls = <&mux 1>; 64*4882a593Smuzhiyun mdio-parent-bus = <&emdio2>; 65*4882a593Smuzhiyun #address-cells = <1>; 66*4882a593Smuzhiyun #size-cells = <0>; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun mdio@0 { 69*4882a593Smuzhiyun reg = <0x0>; 70*4882a593Smuzhiyun #address-cells = <1>; 71*4882a593Smuzhiyun #size-cells = <0>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun mdio@1 { 75*4882a593Smuzhiyun reg = <0x1>; 76*4882a593Smuzhiyun #address-cells = <1>; 77*4882a593Smuzhiyun #size-cells = <0>; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun .. 81*4882a593Smuzhiyun .. 82*4882a593Smuzhiyun}; 83