1*4882a593Smuzhiyun* Marvell MDIO Ethernet Controller interface 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Ethernet controllers of the Marvel Kirkwood, Dove, Orion5x, 4*4882a593SmuzhiyunMV78xx0, Armada 370, Armada XP, Armada 7k and Armada 8k have an 5*4882a593Smuzhiyunidentical unit that provides an interface with the MDIO bus. 6*4882a593SmuzhiyunAdditionally, Armada 7k and Armada 8k has a second unit which 7*4882a593Smuzhiyunprovides an interface with the xMDIO bus. This driver handles 8*4882a593Smuzhiyunthese interfaces. 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunRequired properties: 11*4882a593Smuzhiyun- compatible: "marvell,orion-mdio" or "marvell,xmdio" 12*4882a593Smuzhiyun- reg: address and length of the MDIO registers. When an interrupt is 13*4882a593Smuzhiyun not present, the length is the size of the SMI register (4 bytes) 14*4882a593Smuzhiyun otherwise it must be 0x84 bytes to cover the interrupt control 15*4882a593Smuzhiyun registers. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunOptional properties: 18*4882a593Smuzhiyun- interrupts: interrupt line number for the SMI error/done interrupt 19*4882a593Smuzhiyun- clocks: phandle for up to four required clocks for the MDIO instance 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunThe child nodes of the MDIO driver are the individual PHY devices 22*4882a593Smuzhiyunconnected to this MDIO bus. They must have a "reg" property given the 23*4882a593SmuzhiyunPHY address on the MDIO bus. 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunExample at the SoC level without an interrupt property: 26*4882a593Smuzhiyun 27*4882a593Smuzhiyunmdio { 28*4882a593Smuzhiyun #address-cells = <1>; 29*4882a593Smuzhiyun #size-cells = <0>; 30*4882a593Smuzhiyun compatible = "marvell,orion-mdio"; 31*4882a593Smuzhiyun reg = <0xd0072004 0x4>; 32*4882a593Smuzhiyun}; 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunExample with an interrupt property: 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunmdio { 37*4882a593Smuzhiyun #address-cells = <1>; 38*4882a593Smuzhiyun #size-cells = <0>; 39*4882a593Smuzhiyun compatible = "marvell,orion-mdio"; 40*4882a593Smuzhiyun reg = <0xd0072004 0x84>; 41*4882a593Smuzhiyun interrupts = <30>; 42*4882a593Smuzhiyun}; 43*4882a593Smuzhiyun 44*4882a593SmuzhiyunAnd at the board level: 45*4882a593Smuzhiyun 46*4882a593Smuzhiyunmdio { 47*4882a593Smuzhiyun phy0: ethernet-phy@0 { 48*4882a593Smuzhiyun reg = <0>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun phy1: ethernet-phy@1 { 52*4882a593Smuzhiyun reg = <1>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun} 55