1*4882a593Smuzhiyun* Cadence MACB/GEM Ethernet controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Should be "cdns,[<chip>-]{macb|gem}" 5*4882a593Smuzhiyun Use "cdns,at91rm9200-emac" Atmel at91rm9200 SoC. 6*4882a593Smuzhiyun Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs. 7*4882a593Smuzhiyun Use "cdns,sam9x60-macb" for Microchip sam9x60 SoC. 8*4882a593Smuzhiyun Use "cdns,np4-macb" for NP4 SoC devices. 9*4882a593Smuzhiyun Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb". 10*4882a593Smuzhiyun Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on 11*4882a593Smuzhiyun the Cadence GEM, or the generic form: "cdns,gem". 12*4882a593Smuzhiyun Use "atmel,sama5d2-gem" for the GEM IP (10/100) available on Atmel sama5d2 SoCs. 13*4882a593Smuzhiyun Use "atmel,sama5d3-macb" for the 10/100Mbit IP available on Atmel sama5d3 SoCs. 14*4882a593Smuzhiyun Use "atmel,sama5d3-gem" for the Gigabit IP available on Atmel sama5d3 SoCs. 15*4882a593Smuzhiyun Use "atmel,sama5d4-gem" for the GEM IP (10/100) available on Atmel sama5d4 SoCs. 16*4882a593Smuzhiyun Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC. 17*4882a593Smuzhiyun Use "cdns,zynqmp-gem" for Zynq Ultrascale+ MPSoC. 18*4882a593Smuzhiyun Use "sifive,fu540-c000-gem" for SiFive FU540-C000 SoC. 19*4882a593Smuzhiyun Or the generic form: "cdns,emac". 20*4882a593Smuzhiyun- reg: Address and length of the register set for the device 21*4882a593Smuzhiyun For "sifive,fu540-c000-gem", second range is required to specify the 22*4882a593Smuzhiyun address and length of the registers for GEMGXL Management block. 23*4882a593Smuzhiyun- interrupts: Should contain macb interrupt 24*4882a593Smuzhiyun- phy-mode: See ethernet.txt file in the same directory. 25*4882a593Smuzhiyun- clock-names: Tuple listing input clock names. 26*4882a593Smuzhiyun Required elements: 'pclk', 'hclk' 27*4882a593Smuzhiyun Optional elements: 'tx_clk' 28*4882a593Smuzhiyun Optional elements: 'rx_clk' applies to cdns,zynqmp-gem 29*4882a593Smuzhiyun Optional elements: 'tsu_clk' 30*4882a593Smuzhiyun- clocks: Phandles to input clocks. 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunThe MAC address will be determined using the optional properties 33*4882a593Smuzhiyundefined in ethernet.txt. 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunOptional properties for PHY child node: 36*4882a593Smuzhiyun- reset-gpios : Should specify the gpio for phy reset 37*4882a593Smuzhiyun- magic-packet : If present, indicates that the hardware supports waking 38*4882a593Smuzhiyun up via magic packet. 39*4882a593Smuzhiyun- phy-handle : see ethernet.txt file in the same directory 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunExamples: 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun macb0: ethernet@fffc4000 { 44*4882a593Smuzhiyun compatible = "cdns,at32ap7000-macb"; 45*4882a593Smuzhiyun reg = <0xfffc4000 0x4000>; 46*4882a593Smuzhiyun interrupts = <21>; 47*4882a593Smuzhiyun phy-mode = "rmii"; 48*4882a593Smuzhiyun local-mac-address = [3a 0e 03 04 05 06]; 49*4882a593Smuzhiyun clock-names = "pclk", "hclk", "tx_clk"; 50*4882a593Smuzhiyun clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; 51*4882a593Smuzhiyun ethernet-phy@1 { 52*4882a593Smuzhiyun reg = <0x1>; 53*4882a593Smuzhiyun reset-gpios = <&pioE 6 1>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun }; 56