xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/imx-dwmac.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593SmuzhiyunIMX8 glue layer controller, NXP imx8 families support Synopsys MAC 5.10a IP.
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThis file documents platform glue layer for IMX.
4*4882a593SmuzhiyunPlease see stmmac.txt for the other unchanged properties.
5*4882a593Smuzhiyun
6*4882a593SmuzhiyunThe device node has following properties.
7*4882a593Smuzhiyun
8*4882a593SmuzhiyunRequired properties:
9*4882a593Smuzhiyun- compatible:  Should be "nxp,imx8mp-dwmac-eqos" to select glue layer
10*4882a593Smuzhiyun	       and "snps,dwmac-5.10a" to select IP version.
11*4882a593Smuzhiyun- clocks: Must contain a phandle for each entry in clock-names.
12*4882a593Smuzhiyun- clock-names: Should be "stmmaceth" for the host clock.
13*4882a593Smuzhiyun	       Should be "pclk" for the MAC apb clock.
14*4882a593Smuzhiyun	       Should be "ptp_ref" for the MAC timer clock.
15*4882a593Smuzhiyun	       Should be "tx" for the MAC RGMII TX clock:
16*4882a593Smuzhiyun	       Should be "mem" for EQOS MEM clock.
17*4882a593Smuzhiyun		- "mem" clock is required for imx8dxl platform.
18*4882a593Smuzhiyun		- "mem" clock is not required for imx8mp platform.
19*4882a593Smuzhiyun- interrupt-names: Should contain a list of interrupt names corresponding to
20*4882a593Smuzhiyun		   the interrupts in the interrupts property, if available.
21*4882a593Smuzhiyun		   Should be "macirq" for the main MAC IRQ
22*4882a593Smuzhiyun		   Should be "eth_wake_irq" for the IT which wake up system
23*4882a593Smuzhiyun- intf_mode: Should be phandle/offset pair. The phandle to the syscon node which
24*4882a593Smuzhiyun	     encompases the GPR register, and the offset of the GPR register.
25*4882a593Smuzhiyun		- required for imx8mp platform.
26*4882a593Smuzhiyun		- is optional for imx8dxl platform.
27*4882a593Smuzhiyun
28*4882a593SmuzhiyunOptional properties:
29*4882a593Smuzhiyun- intf_mode: is optional for imx8dxl platform.
30*4882a593Smuzhiyun- snps,rmii_refclk_ext: to select RMII reference clock from external.
31*4882a593Smuzhiyun
32*4882a593SmuzhiyunExample:
33*4882a593Smuzhiyun	eqos: ethernet@30bf0000 {
34*4882a593Smuzhiyun		compatible = "nxp,imx8mp-dwmac-eqos", "snps,dwmac-5.10a";
35*4882a593Smuzhiyun		reg = <0x30bf0000 0x10000>;
36*4882a593Smuzhiyun		interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
37*4882a593Smuzhiyun			     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
38*4882a593Smuzhiyun		interrupt-names = "eth_wake_irq", "macirq";
39*4882a593Smuzhiyun		clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,
40*4882a593Smuzhiyun			 <&clk IMX8MP_CLK_QOS_ENET_ROOT>,
41*4882a593Smuzhiyun			 <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
42*4882a593Smuzhiyun			 <&clk IMX8MP_CLK_ENET_QOS>;
43*4882a593Smuzhiyun		clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";
44*4882a593Smuzhiyun		assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>,
45*4882a593Smuzhiyun				  <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
46*4882a593Smuzhiyun				  <&clk IMX8MP_CLK_ENET_QOS>;
47*4882a593Smuzhiyun		assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
48*4882a593Smuzhiyun					 <&clk IMX8MP_SYS_PLL2_100M>,
49*4882a593Smuzhiyun					 <&clk IMX8MP_SYS_PLL2_125M>;
50*4882a593Smuzhiyun		assigned-clock-rates = <0>, <100000000>, <125000000>;
51*4882a593Smuzhiyun		nvmem-cells = <&eth_mac0>;
52*4882a593Smuzhiyun		nvmem-cell-names = "mac-address";
53*4882a593Smuzhiyun		nvmem_macaddr_swap;
54*4882a593Smuzhiyun		intf_mode = <&gpr 0x4>;
55*4882a593Smuzhiyun		status = "disabled";
56*4882a593Smuzhiyun	};
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