1*4882a593SmuzhiyunHisilicon DSA Fabric device controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: should be "hisilicon,hns-dsaf-v1" or "hisilicon,hns-dsaf-v2". 5*4882a593Smuzhiyun "hisilicon,hns-dsaf-v1" is for hip05. 6*4882a593Smuzhiyun "hisilicon,hns-dsaf-v2" is for Hi1610 and Hi1612. 7*4882a593Smuzhiyun- mode: dsa fabric mode string. only support one of dsaf modes like these: 8*4882a593Smuzhiyun "2port-64vf", 9*4882a593Smuzhiyun "6port-16rss", 10*4882a593Smuzhiyun "6port-16vf", 11*4882a593Smuzhiyun "single-port". 12*4882a593Smuzhiyun- interrupts: should contain the DSA Fabric and rcb interrupt. 13*4882a593Smuzhiyun- reg: specifies base physical address(es) and size of the device registers. 14*4882a593Smuzhiyun The first region is external interface control register base and size(optional, 15*4882a593Smuzhiyun only used when subctrl-syscon does not exist). It is recommended using 16*4882a593Smuzhiyun subctrl-syscon rather than this address. 17*4882a593Smuzhiyun The second region is SerDes base register and size(optional, only used when 18*4882a593Smuzhiyun serdes-syscon in port node does not exist). It is recommended using 19*4882a593Smuzhiyun serdes-syscon rather than this address. 20*4882a593Smuzhiyun The third region is the PPE register base and size. 21*4882a593Smuzhiyun The fourth region is dsa fabric base register and size. It is not required for 22*4882a593Smuzhiyun single-port mode. 23*4882a593Smuzhiyun- reg-names: may be ppe-base and(or) dsaf-base. It is used to find the 24*4882a593Smuzhiyun corresponding reg's index. 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun- phy-handle: phy handle of physical port, 0 if not any phy device. It is optional 27*4882a593Smuzhiyun attribute. If port node exists, phy-handle in each port node will be used. 28*4882a593Smuzhiyun see ethernet.txt [1]. 29*4882a593Smuzhiyun- subctrl-syscon: is syscon handle for external interface control register. 30*4882a593Smuzhiyun- reset-field-offset: is offset of reset field. Its value depends on the hardware 31*4882a593Smuzhiyun user manual. 32*4882a593Smuzhiyun- buf-size: rx buffer size, should be 16-1024. 33*4882a593Smuzhiyun- desc-num: number of description in TX and RX queue, should be 512, 1024, 2048 or 4096. 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun- port: subnodes of dsaf. A dsaf node may contain several port nodes(Depending 36*4882a593Smuzhiyun on mode of dsaf). Port node contain some attributes listed below: 37*4882a593Smuzhiyun- reg: is physical port index in one dsaf. 38*4882a593Smuzhiyun- phy-handle: phy handle of physical port. It is not required if there isn't 39*4882a593Smuzhiyun phy device. see ethernet.txt [1]. 40*4882a593Smuzhiyun- serdes-syscon: is syscon handle for SerDes register. 41*4882a593Smuzhiyun- cpld-syscon: is syscon handle + register offset pair for cpld register. It is 42*4882a593Smuzhiyun not required if there isn't cpld device. 43*4882a593Smuzhiyun- port-rst-offset: is offset of reset field for each port in dsaf. Its value 44*4882a593Smuzhiyun depends on the hardware user manual. 45*4882a593Smuzhiyun- port-mode-offset: is offset of port mode field for each port in dsaf. Its 46*4882a593Smuzhiyun value depends on the hardware user manual. 47*4882a593Smuzhiyun- mc-mac-mask: mask of multicast address, determines bit in multicast address 48*4882a593Smuzhiyun to set: 49*4882a593Smuzhiyun 1 stands for this bit will be precisely matched, TCAM will check this bit of 50*4882a593Smuzhiyun MAC address. 51*4882a593Smuzhiyun 0 stands for this bit will be fuzzy matched, TCAM won't care about this bit 52*4882a593Smuzhiyun of MAC address. 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/net/phy.txt 55*4882a593Smuzhiyun 56*4882a593SmuzhiyunExample: 57*4882a593Smuzhiyun 58*4882a593Smuzhiyundsaf0: dsa@c7000000 { 59*4882a593Smuzhiyun compatible = "hisilicon,hns-dsaf-v1"; 60*4882a593Smuzhiyun mode = "6port-16rss"; 61*4882a593Smuzhiyun interrupt-parent = <&mbigen_dsa>; 62*4882a593Smuzhiyun reg = <0x0 0xc5000000 0x0 0x890000 63*4882a593Smuzhiyun 0x0 0xc7000000 0x0 0x60000>; 64*4882a593Smuzhiyun reg-names = "ppe-base", "dsaf-base"; 65*4882a593Smuzhiyun subctrl-syscon = <&subctrl>; 66*4882a593Smuzhiyun reset-field-offset = 0; 67*4882a593Smuzhiyun interrupts = <131 4>,<132 4>, <133 4>,<134 4>, 68*4882a593Smuzhiyun <135 4>,<136 4>, <137 4>,<138 4>, 69*4882a593Smuzhiyun <139 4>,<140 4>, <141 4>,<142 4>, 70*4882a593Smuzhiyun <143 4>,<144 4>, <145 4>,<146 4>, 71*4882a593Smuzhiyun <147 4>,<148 4>, <384 1>,<385 1>, 72*4882a593Smuzhiyun <386 1>,<387 1>, <388 1>,<389 1>, 73*4882a593Smuzhiyun <390 1>,<391 1>, 74*4882a593Smuzhiyun buf-size = <4096>; 75*4882a593Smuzhiyun desc-num = <1024>; 76*4882a593Smuzhiyun dma-coherent; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun port@0 { 79*4882a593Smuzhiyun reg = 0; 80*4882a593Smuzhiyun phy-handle = <&phy0>; 81*4882a593Smuzhiyun serdes-syscon = <&serdes>; 82*4882a593Smuzhiyun mc-mac-mask = [ff f0 00 00 00 00]; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun port@1 { 86*4882a593Smuzhiyun reg = 1; 87*4882a593Smuzhiyun serdes-syscon = <&serdes>; 88*4882a593Smuzhiyun mc-mac-mask = [ff f0 00 00 00 00]; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun}; 91