1*4882a593SmuzhiyunHisilicon Fast Ethernet MDIO Controller interface 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: should be "hisilicon,hisi-femac-mdio". 5*4882a593Smuzhiyun- reg: address and length of the register set for the device. 6*4882a593Smuzhiyun- clocks: A phandle to the reference clock for this device. 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun- PHY subnode: inherits from phy binding [1] 9*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/net/phy.txt 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunExample: 12*4882a593Smuzhiyunmdio: mdio@10091100 { 13*4882a593Smuzhiyun compatible = "hisilicon,hisi-femac-mdio"; 14*4882a593Smuzhiyun reg = <0x10091100 0x10>; 15*4882a593Smuzhiyun clocks = <&crg HI3516CV300_MDIO_CLK>; 16*4882a593Smuzhiyun #address-cells = <1>; 17*4882a593Smuzhiyun #size-cells = <0>; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun phy0: phy@1 { 20*4882a593Smuzhiyun reg = <1>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun}; 23