xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/emac_rockchip.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* ARC EMAC 10/100 Ethernet platform driver for Rockchip RK3036/RK3066/RK3188 SoCs
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunRequired properties:
4*4882a593Smuzhiyun- compatible: should be "rockchip,<name>-emac"
5*4882a593Smuzhiyun   "rockchip,rk3036-emac": found on RK3036 SoCs
6*4882a593Smuzhiyun   "rockchip,rk3066-emac": found on RK3066 SoCs
7*4882a593Smuzhiyun   "rockchip,rk3188-emac": found on RK3188 SoCs
8*4882a593Smuzhiyun- reg: Address and length of the register set for the device
9*4882a593Smuzhiyun- interrupts: Should contain the EMAC interrupts
10*4882a593Smuzhiyun- rockchip,grf: phandle to the syscon grf used to control speed and mode
11*4882a593Smuzhiyun  for emac.
12*4882a593Smuzhiyun- phy: see ethernet.txt file in the same directory.
13*4882a593Smuzhiyun- phy-mode: see ethernet.txt file in the same directory.
14*4882a593Smuzhiyun
15*4882a593SmuzhiyunOptional properties:
16*4882a593Smuzhiyun- phy-supply: phandle to a regulator if the PHY needs one
17*4882a593Smuzhiyun
18*4882a593SmuzhiyunClock handling:
19*4882a593Smuzhiyun- clocks: Must contain an entry for each entry in clock-names.
20*4882a593Smuzhiyun- clock-names: Shall be "hclk" for the host clock needed to calculate and set
21*4882a593Smuzhiyun  polling period of EMAC and "macref" for the reference clock needed to transfer
22*4882a593Smuzhiyun  data to and from the phy.
23*4882a593Smuzhiyun
24*4882a593SmuzhiyunChild nodes of the driver are the individual PHY devices connected to the
25*4882a593SmuzhiyunMDIO bus. They must have a "reg" property given the PHY address on the MDIO bus.
26*4882a593Smuzhiyun
27*4882a593SmuzhiyunExamples:
28*4882a593Smuzhiyun
29*4882a593Smuzhiyunethernet@10204000 {
30*4882a593Smuzhiyun	compatible = "rockchip,rk3188-emac";
31*4882a593Smuzhiyun	reg = <0xc0fc2000 0x3c>;
32*4882a593Smuzhiyun	interrupts = <6>;
33*4882a593Smuzhiyun	mac-address = [ 00 11 22 33 44 55 ];
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
36*4882a593Smuzhiyun	clock-names = "hclk", "macref";
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun	pinctrl-names = "default";
39*4882a593Smuzhiyun	pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	rockchip,grf = <&grf>;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	phy = <&phy0>;
44*4882a593Smuzhiyun	phy-mode = "rmii";
45*4882a593Smuzhiyun	phy-supply = <&vcc_rmii>;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	#address-cells = <1>;
48*4882a593Smuzhiyun	#size-cells = <0>;
49*4882a593Smuzhiyun	phy0: ethernet-phy@0 {
50*4882a593Smuzhiyun	      reg = <1>;
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun};
53