xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/dsa/marvell.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunMarvell DSA Switch Device Tree Bindings
2*4882a593Smuzhiyun---------------------------------------
3*4882a593Smuzhiyun
4*4882a593SmuzhiyunWARNING: This binding is currently unstable. Do not program it into a
5*4882a593SmuzhiyunFLASH never to be changed again. Once this binding is stable, this
6*4882a593Smuzhiyunwarning will be removed.
7*4882a593Smuzhiyun
8*4882a593SmuzhiyunIf you need a stable binding, use the old dsa.txt binding.
9*4882a593Smuzhiyun
10*4882a593SmuzhiyunMarvell Switches are MDIO devices. The following properties should be
11*4882a593Smuzhiyunplaced as a child node of an mdio device.
12*4882a593Smuzhiyun
13*4882a593SmuzhiyunThe properties described here are those specific to Marvell devices.
14*4882a593SmuzhiyunAdditional required and optional properties can be found in dsa.txt.
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunThe compatibility string is used only to find an identification register,
17*4882a593Smuzhiyunwhich is at a different MDIO base address in different switch families.
18*4882a593Smuzhiyun- "marvell,mv88e6085"	: Switch has base address 0x10. Use with models:
19*4882a593Smuzhiyun			  6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165,
20*4882a593Smuzhiyun			  6171, 6172, 6175, 6176, 6185, 6240, 6320, 6321,
21*4882a593Smuzhiyun			  6341, 6350, 6351, 6352
22*4882a593Smuzhiyun- "marvell,mv88e6190"	: Switch has base address 0x00. Use with models:
23*4882a593Smuzhiyun			  6190, 6190X, 6191, 6290, 6390, 6390X
24*4882a593Smuzhiyun- "marvell,mv88e6250"	: Switch has base address 0x08 or 0x18. Use with model:
25*4882a593Smuzhiyun			  6220, 6250
26*4882a593Smuzhiyun
27*4882a593SmuzhiyunRequired properties:
28*4882a593Smuzhiyun- compatible		: Should be one of "marvell,mv88e6085",
29*4882a593Smuzhiyun			  "marvell,mv88e6190" or "marvell,mv88e6250" as
30*4882a593Smuzhiyun			  indicated above
31*4882a593Smuzhiyun- reg			: Address on the MII bus for the switch.
32*4882a593Smuzhiyun
33*4882a593SmuzhiyunOptional properties:
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun- reset-gpios		: Should be a gpio specifier for a reset line
36*4882a593Smuzhiyun- interrupts		: Interrupt from the switch
37*4882a593Smuzhiyun- interrupt-controller	: Indicates the switch is itself an interrupt
38*4882a593Smuzhiyun			  controller. This is used for the PHY interrupts.
39*4882a593Smuzhiyun#interrupt-cells = <2>	: Controller uses two cells, number and flag
40*4882a593Smuzhiyun- eeprom-length		: Set to the length of an EEPROM connected to the
41*4882a593Smuzhiyun			  switch. Must be set if the switch can not detect
42*4882a593Smuzhiyun			  the presence and/or size of a connected EEPROM,
43*4882a593Smuzhiyun			  otherwise optional.
44*4882a593Smuzhiyun- mdio			: Container of PHY and devices on the switches MDIO
45*4882a593Smuzhiyun			  bus.
46*4882a593Smuzhiyun- mdio?		: Container of PHYs and devices on the external MDIO
47*4882a593Smuzhiyun			  bus. The node must contains a compatible string of
48*4882a593Smuzhiyun			  "marvell,mv88e6xxx-mdio-external"
49*4882a593Smuzhiyun
50*4882a593SmuzhiyunExample:
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun	mdio {
53*4882a593Smuzhiyun		#address-cells = <1>;
54*4882a593Smuzhiyun		#size-cells = <0>;
55*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
56*4882a593Smuzhiyun		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
57*4882a593Smuzhiyun		interrupt-controller;
58*4882a593Smuzhiyun		#interrupt-cells = <2>;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		switch0: switch@0 {
61*4882a593Smuzhiyun			compatible = "marvell,mv88e6085";
62*4882a593Smuzhiyun			reg = <0>;
63*4882a593Smuzhiyun			reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun			mdio {
66*4882a593Smuzhiyun				#address-cells = <1>;
67*4882a593Smuzhiyun				#size-cells = <0>;
68*4882a593Smuzhiyun				switch1phy0: switch1phy0@0 {
69*4882a593Smuzhiyun					reg = <0>;
70*4882a593Smuzhiyun					interrupt-parent = <&switch0>;
71*4882a593Smuzhiyun					interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
72*4882a593Smuzhiyun				};
73*4882a593Smuzhiyun			};
74*4882a593Smuzhiyun		};
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	mdio {
78*4882a593Smuzhiyun		#address-cells = <1>;
79*4882a593Smuzhiyun		#size-cells = <0>;
80*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
81*4882a593Smuzhiyun		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
82*4882a593Smuzhiyun		interrupt-controller;
83*4882a593Smuzhiyun		#interrupt-cells = <2>;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun		switch0: switch@0 {
86*4882a593Smuzhiyun			compatible = "marvell,mv88e6390";
87*4882a593Smuzhiyun			reg = <0>;
88*4882a593Smuzhiyun			reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun			mdio {
91*4882a593Smuzhiyun				#address-cells = <1>;
92*4882a593Smuzhiyun				#size-cells = <0>;
93*4882a593Smuzhiyun				switch1phy0: switch1phy0@0 {
94*4882a593Smuzhiyun					reg = <0>;
95*4882a593Smuzhiyun					interrupt-parent = <&switch0>;
96*4882a593Smuzhiyun					interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
97*4882a593Smuzhiyun				};
98*4882a593Smuzhiyun			};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun			mdio1 {
101*4882a593Smuzhiyun				compatible = "marvell,mv88e6xxx-mdio-external";
102*4882a593Smuzhiyun				#address-cells = <1>;
103*4882a593Smuzhiyun				#size-cells = <0>;
104*4882a593Smuzhiyun				switch1phy9: switch1phy0@9 {
105*4882a593Smuzhiyun					reg = <9>;
106*4882a593Smuzhiyun				};
107*4882a593Smuzhiyun			};
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun	};
110