1*4882a593Smuzhiyun* PIP Ethernet nexus. 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe PIP Ethernet nexus can control several data packet input/output 4*4882a593Smuzhiyundevices. The devices have a two level grouping scheme. There may be 5*4882a593Smuzhiyunseveral interfaces, and each interface may have several ports. These 6*4882a593Smuzhiyunports might be an individual Ethernet PHY. 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunProperties for the PIP nexus: 10*4882a593Smuzhiyun- compatible: "cavium,octeon-3860-pip" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun- reg: The base address of the PIP's register bank. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun- #address-cells: Must be <1>. 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun- #size-cells: Must be <0>. 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunProperties for PIP interfaces which is a child the PIP nexus: 21*4882a593Smuzhiyun- compatible: "cavium,octeon-3860-pip-interface" 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun- reg: The interface number. 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun- #address-cells: Must be <1>. 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun- #size-cells: Must be <0>. 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunProperties for PIP port which is a child the PIP interface: 32*4882a593Smuzhiyun- compatible: "cavium,octeon-3860-pip-port" 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun- reg: The port number within the interface group. 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun- phy-handle: Optional, see ethernet.txt file in the same directory. 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun- rx-delay: Delay value for RGMII receive clock. Optional. Disabled if 0. 41*4882a593Smuzhiyun Value range is 1-31, and mapping to the actual delay varies depending on HW. 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun- tx-delay: Delay value for RGMII transmit clock. Optional. Disabled if 0. 44*4882a593Smuzhiyun Value range is 1-31, and mapping to the actual delay varies depending on HW. 45*4882a593Smuzhiyun 46*4882a593SmuzhiyunExample: 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun pip@11800a0000000 { 49*4882a593Smuzhiyun compatible = "cavium,octeon-3860-pip"; 50*4882a593Smuzhiyun #address-cells = <1>; 51*4882a593Smuzhiyun #size-cells = <0>; 52*4882a593Smuzhiyun reg = <0x11800 0xa0000000 0x0 0x2000>; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun interface@0 { 55*4882a593Smuzhiyun compatible = "cavium,octeon-3860-pip-interface"; 56*4882a593Smuzhiyun #address-cells = <1>; 57*4882a593Smuzhiyun #size-cells = <0>; 58*4882a593Smuzhiyun reg = <0>; /* interface */ 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun ethernet@0 { 61*4882a593Smuzhiyun compatible = "cavium,octeon-3860-pip-port"; 62*4882a593Smuzhiyun reg = <0x0>; /* Port */ 63*4882a593Smuzhiyun local-mac-address = [ 00 0f b7 10 63 60 ]; 64*4882a593Smuzhiyun phy-handle = <&phy2>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun ethernet@1 { 67*4882a593Smuzhiyun compatible = "cavium,octeon-3860-pip-port"; 68*4882a593Smuzhiyun reg = <0x1>; /* Port */ 69*4882a593Smuzhiyun local-mac-address = [ 00 0f b7 10 63 61 ]; 70*4882a593Smuzhiyun phy-handle = <&phy3>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun ethernet@2 { 73*4882a593Smuzhiyun compatible = "cavium,octeon-3860-pip-port"; 74*4882a593Smuzhiyun reg = <0x2>; /* Port */ 75*4882a593Smuzhiyun local-mac-address = [ 00 0f b7 10 63 62 ]; 76*4882a593Smuzhiyun phy-handle = <&phy4>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun ethernet@3 { 79*4882a593Smuzhiyun compatible = "cavium,octeon-3860-pip-port"; 80*4882a593Smuzhiyun reg = <0x3>; /* Port */ 81*4882a593Smuzhiyun local-mac-address = [ 00 0f b7 10 63 63 ]; 82*4882a593Smuzhiyun phy-handle = <&phy5>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun interface@1 { 87*4882a593Smuzhiyun compatible = "cavium,octeon-3860-pip-interface"; 88*4882a593Smuzhiyun #address-cells = <1>; 89*4882a593Smuzhiyun #size-cells = <0>; 90*4882a593Smuzhiyun reg = <1>; /* interface */ 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun ethernet@0 { 93*4882a593Smuzhiyun compatible = "cavium,octeon-3860-pip-port"; 94*4882a593Smuzhiyun reg = <0x0>; /* Port */ 95*4882a593Smuzhiyun local-mac-address = [ 00 0f b7 10 63 64 ]; 96*4882a593Smuzhiyun phy-handle = <&phy6>; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun }; 100