1*4882a593SmuzhiyunRockchip CAN controller Device Tree Bindings 2*4882a593Smuzhiyun--------------------------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun- compatible : Should be: 6*4882a593Smuzhiyun - "rockchip,can-1.0" for CAN controllers 1.0 7*4882a593Smuzhiyun- reg : Physical base address and size of the controller 8*4882a593Smuzhiyun registers map. 9*4882a593Smuzhiyun- interrupts : Property with a value describing the interrupt 10*4882a593Smuzhiyun number. 11*4882a593Smuzhiyun- clock-names : List of input clock names 12*4882a593Smuzhiyun - "can_clk", "pclk", 13*4882a593Smuzhiyun (See clock bindings for details). 14*4882a593Smuzhiyun- clocks : Clock phandles (see clock bindings for details). 15*4882a593Smuzhiyun- resets : Must contain an entry for each entry in reset-names. 16*4882a593Smuzhiyun See ../reset/reset.txt for details. 17*4882a593Smuzhiyun- reset-names : List of input reset names 18*4882a593Smuzhiyun - "can", "can-apb". 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunExample: 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunFor Dts file: 23*4882a593Smuzhiyun can: can@ff250000 { 24*4882a593Smuzhiyun compatible = "rockchip,can-1.0"; 25*4882a593Smuzhiyun reg = <0x0 0xff610000 0x0 0x1000>; 26*4882a593Smuzhiyun interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 27*4882a593Smuzhiyun clocks = <&cru CLK_CAN>, <&cru PCLK_CAN>; 28*4882a593Smuzhiyun clock-names = "baudclk", "apb_pclk"; 29*4882a593Smuzhiyun resets = <&cru SRST_CAN>, &cru SRST_CAN_P>; 30*4882a593Smuzhiyun reset-names = "can", "can-apb"; 31*4882a593Smuzhiyun status = "okay"; 32*4882a593Smuzhiyun }; 33