xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle:
8*4882a593Smuzhiyun  Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
9*4882a593Smuzhiyun
10*4882a593Smuzhiyunmaintainers:
11*4882a593Smuzhiyun  - Marc Kleine-Budde <mkl@pengutronix.de>
12*4882a593Smuzhiyun
13*4882a593SmuzhiyunallOf:
14*4882a593Smuzhiyun  - $ref: can-controller.yaml#
15*4882a593Smuzhiyun
16*4882a593Smuzhiyunproperties:
17*4882a593Smuzhiyun  compatible:
18*4882a593Smuzhiyun    oneOf:
19*4882a593Smuzhiyun      - enum:
20*4882a593Smuzhiyun          - fsl,imx8qm-flexcan
21*4882a593Smuzhiyun          - fsl,imx8mp-flexcan
22*4882a593Smuzhiyun          - fsl,imx6q-flexcan
23*4882a593Smuzhiyun          - fsl,imx28-flexcan
24*4882a593Smuzhiyun          - fsl,imx25-flexcan
25*4882a593Smuzhiyun          - fsl,p1010-flexcan
26*4882a593Smuzhiyun          - fsl,vf610-flexcan
27*4882a593Smuzhiyun          - fsl,ls1021ar2-flexcan
28*4882a593Smuzhiyun          - fsl,lx2160ar1-flexcan
29*4882a593Smuzhiyun      - items:
30*4882a593Smuzhiyun          - enum:
31*4882a593Smuzhiyun              - fsl,imx53-flexcan
32*4882a593Smuzhiyun              - fsl,imx35-flexcan
33*4882a593Smuzhiyun          - const: fsl,imx25-flexcan
34*4882a593Smuzhiyun      - items:
35*4882a593Smuzhiyun          - enum:
36*4882a593Smuzhiyun              - fsl,imx7d-flexcan
37*4882a593Smuzhiyun              - fsl,imx6ul-flexcan
38*4882a593Smuzhiyun              - fsl,imx6sx-flexcan
39*4882a593Smuzhiyun          - const: fsl,imx6q-flexcan
40*4882a593Smuzhiyun      - items:
41*4882a593Smuzhiyun          - enum:
42*4882a593Smuzhiyun              - fsl,ls1028ar1-flexcan
43*4882a593Smuzhiyun          - const: fsl,lx2160ar1-flexcan
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun  reg:
46*4882a593Smuzhiyun    maxItems: 1
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun  interrupts:
49*4882a593Smuzhiyun    maxItems: 1
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun  clocks:
52*4882a593Smuzhiyun    maxItems: 2
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun  clock-names:
55*4882a593Smuzhiyun    items:
56*4882a593Smuzhiyun      - const: ipg
57*4882a593Smuzhiyun      - const: per
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun  clock-frequency:
60*4882a593Smuzhiyun    description: |
61*4882a593Smuzhiyun      The oscillator frequency driving the flexcan device, filled in by the
62*4882a593Smuzhiyun      boot loader. This property should only be used the used operating system
63*4882a593Smuzhiyun      doesn't support the clocks and clock-names property.
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun  xceiver-supply:
66*4882a593Smuzhiyun    description: Regulator that powers the CAN transceiver.
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun  big-endian:
69*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/flag
70*4882a593Smuzhiyun    description: |
71*4882a593Smuzhiyun      This means the registers of FlexCAN controller are big endian. This is
72*4882a593Smuzhiyun      optional property.i.e. if this property is not present in device tree
73*4882a593Smuzhiyun      node then controller is assumed to be little endian. If this property is
74*4882a593Smuzhiyun      present then controller is assumed to be big endian.
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun  fsl,stop-mode:
77*4882a593Smuzhiyun    description: |
78*4882a593Smuzhiyun      Register bits of stop mode control.
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun      The format should be as follows:
81*4882a593Smuzhiyun      <gpr req_gpr req_bit>
82*4882a593Smuzhiyun      gpr is the phandle to general purpose register node.
83*4882a593Smuzhiyun      req_gpr is the gpr register offset of CAN stop request.
84*4882a593Smuzhiyun      req_bit is the bit offset of CAN stop request.
85*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/phandle-array
86*4882a593Smuzhiyun    items:
87*4882a593Smuzhiyun      items:
88*4882a593Smuzhiyun        - description: The 'gpr' is the phandle to general purpose register node.
89*4882a593Smuzhiyun        - description: The 'req_gpr' is the gpr register offset of CAN stop request.
90*4882a593Smuzhiyun          maximum: 0xff
91*4882a593Smuzhiyun        - description: The 'req_bit' is the bit offset of CAN stop request.
92*4882a593Smuzhiyun          maximum: 0x1f
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun  fsl,clk-source:
95*4882a593Smuzhiyun    description: |
96*4882a593Smuzhiyun      Select the clock source to the CAN Protocol Engine (PE). It's SoC
97*4882a593Smuzhiyun      implementation dependent. Refer to RM for detailed definition. If this
98*4882a593Smuzhiyun      property is not set in device tree node then driver selects clock source 1
99*4882a593Smuzhiyun      by default.
100*4882a593Smuzhiyun      0: clock source 0 (oscillator clock)
101*4882a593Smuzhiyun      1: clock source 1 (peripheral clock)
102*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
103*4882a593Smuzhiyun    default: 1
104*4882a593Smuzhiyun    minimum: 0
105*4882a593Smuzhiyun    maximum: 1
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun  wakeup-source:
108*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/flag
109*4882a593Smuzhiyun    description:
110*4882a593Smuzhiyun      Enable CAN remote wakeup.
111*4882a593Smuzhiyun
112*4882a593Smuzhiyunrequired:
113*4882a593Smuzhiyun  - compatible
114*4882a593Smuzhiyun  - reg
115*4882a593Smuzhiyun  - interrupts
116*4882a593Smuzhiyun
117*4882a593SmuzhiyunadditionalProperties: false
118*4882a593Smuzhiyun
119*4882a593Smuzhiyunexamples:
120*4882a593Smuzhiyun  - |
121*4882a593Smuzhiyun    can@1c000 {
122*4882a593Smuzhiyun        compatible = "fsl,p1010-flexcan";
123*4882a593Smuzhiyun        reg = <0x1c000 0x1000>;
124*4882a593Smuzhiyun        interrupts = <48 0x2>;
125*4882a593Smuzhiyun        interrupt-parent = <&mpic>;
126*4882a593Smuzhiyun        clock-frequency = <200000000>;
127*4882a593Smuzhiyun        fsl,clk-source = <0>;
128*4882a593Smuzhiyun    };
129*4882a593Smuzhiyun  - |
130*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/irq.h>
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun    can@2090000 {
133*4882a593Smuzhiyun        compatible = "fsl,imx6q-flexcan";
134*4882a593Smuzhiyun        reg = <0x02090000 0x4000>;
135*4882a593Smuzhiyun        interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
136*4882a593Smuzhiyun        clocks = <&clks 1>, <&clks 2>;
137*4882a593Smuzhiyun        clock-names = "ipg", "per";
138*4882a593Smuzhiyun        fsl,stop-mode = <&gpr 0x34 28>;
139*4882a593Smuzhiyun    };
140