xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunProperties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThis MDIO bus multiplexer defines buses that could be internal as well as
4*4882a593Smuzhiyunexternal to SoCs and could accept MDIO transaction compatible to C-22 or
5*4882a593SmuzhiyunC-45 Clause. When child bus is selected, one needs to select these two
6*4882a593Smuzhiyunproperties as well to generate desired MDIO transaction on appropriate bus.
7*4882a593Smuzhiyun
8*4882a593SmuzhiyunRequired properties in addition to the generic multiplexer properties:
9*4882a593Smuzhiyun
10*4882a593SmuzhiyunMDIO multiplexer node:
11*4882a593Smuzhiyun- compatible: brcm,mdio-mux-iproc.
12*4882a593Smuzhiyun
13*4882a593SmuzhiyunEvery non-ethernet PHY requires a compatible so that it could be probed based
14*4882a593Smuzhiyunon this compatible string.
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunOptional properties:
17*4882a593Smuzhiyun- clocks: phandle of the core clock which drives the mdio block.
18*4882a593Smuzhiyun
19*4882a593SmuzhiyunAdditional information regarding generic multiplexer properties can be found
20*4882a593Smuzhiyunat- Documentation/devicetree/bindings/net/mdio-mux.txt
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun
23*4882a593Smuzhiyunfor example:
24*4882a593Smuzhiyun		mdio_mux_iproc: mdio-mux@66020000 {
25*4882a593Smuzhiyun			compatible = "brcm,mdio-mux-iproc";
26*4882a593Smuzhiyun			reg = <0x66020000 0x250>;
27*4882a593Smuzhiyun			#address-cells = <1>;
28*4882a593Smuzhiyun			#size-cells = <0>;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun			mdio@0 {
31*4882a593Smuzhiyun				reg = <0x0>;
32*4882a593Smuzhiyun				#address-cells = <1>;
33*4882a593Smuzhiyun				#size-cells = <0>;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun				pci_phy0: pci-phy@0 {
36*4882a593Smuzhiyun					compatible = "brcm,ns2-pcie-phy";
37*4882a593Smuzhiyun					reg = <0x0>;
38*4882a593Smuzhiyun					#phy-cells = <0>;
39*4882a593Smuzhiyun				};
40*4882a593Smuzhiyun			};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun			mdio@7 {
43*4882a593Smuzhiyun				reg = <0x7>;
44*4882a593Smuzhiyun				#address-cells = <1>;
45*4882a593Smuzhiyun				#size-cells = <0>;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun				pci_phy1: pci-phy@0 {
48*4882a593Smuzhiyun					compatible = "brcm,ns2-pcie-phy";
49*4882a593Smuzhiyun					reg = <0x0>;
50*4882a593Smuzhiyun					#phy-cells = <0>;
51*4882a593Smuzhiyun				};
52*4882a593Smuzhiyun			};
53*4882a593Smuzhiyun			mdio@10 {
54*4882a593Smuzhiyun				reg = <0x10>;
55*4882a593Smuzhiyun				#address-cells = <1>;
56*4882a593Smuzhiyun				#size-cells = <0>;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun				gphy0: eth-phy@10 {
59*4882a593Smuzhiyun					reg = <0x10>;
60*4882a593Smuzhiyun				};
61*4882a593Smuzhiyun			};
62*4882a593Smuzhiyun		};
63