1*4882a593Smuzhiyun* Synopsys ARC EMAC 10/100 Ethernet driver (EMAC) 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Should be "snps,arc-emac" 5*4882a593Smuzhiyun- reg: Address and length of the register set for the device 6*4882a593Smuzhiyun- interrupts: Should contain the EMAC interrupts 7*4882a593Smuzhiyun- max-speed: see ethernet.txt file in the same directory. 8*4882a593Smuzhiyun- phy: see ethernet.txt file in the same directory. 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunOptional properties: 11*4882a593Smuzhiyun- phy-reset-gpios : Should specify the gpio for phy reset 12*4882a593Smuzhiyun- phy-reset-duration : Reset duration in milliseconds. Should present 13*4882a593Smuzhiyun only if property "phy-reset-gpios" is available. Missing the property 14*4882a593Smuzhiyun will have the duration be 1 millisecond. Numbers greater than 1000 are 15*4882a593Smuzhiyun invalid and 1 millisecond will be used instead. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunClock handling: 18*4882a593SmuzhiyunThe clock frequency is needed to calculate and set polling period of EMAC. 19*4882a593SmuzhiyunIt must be provided by one of: 20*4882a593Smuzhiyun- clock-frequency: CPU frequency. 21*4882a593Smuzhiyun- clocks: reference to the clock supplying the EMAC. 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunChild nodes of the driver are the individual PHY devices connected to the 24*4882a593SmuzhiyunMDIO bus. They must have a "reg" property given the PHY address on the MDIO bus. 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunExamples: 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun ethernet@c0fc2000 { 29*4882a593Smuzhiyun compatible = "snps,arc-emac"; 30*4882a593Smuzhiyun reg = <0xc0fc2000 0x3c>; 31*4882a593Smuzhiyun interrupts = <6>; 32*4882a593Smuzhiyun mac-address = [ 00 11 22 33 44 55 ]; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun clock-frequency = <80000000>; 35*4882a593Smuzhiyun /* or */ 36*4882a593Smuzhiyun clocks = <&emac_clock>; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun max-speed = <100>; 39*4882a593Smuzhiyun phy = <&phy0>; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #address-cells = <1>; 42*4882a593Smuzhiyun #size-cells = <0>; 43*4882a593Smuzhiyun phy0: ethernet-phy@0 { 44*4882a593Smuzhiyun reg = <1>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun }; 47