1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Allwinner A83t EMAC Device Tree Bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Chen-Yu Tsai <wens@csie.org> 11*4882a593Smuzhiyun - Maxime Ripard <mripard@kernel.org> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunproperties: 14*4882a593Smuzhiyun compatible: 15*4882a593Smuzhiyun oneOf: 16*4882a593Smuzhiyun - const: allwinner,sun8i-a83t-emac 17*4882a593Smuzhiyun - const: allwinner,sun8i-h3-emac 18*4882a593Smuzhiyun - const: allwinner,sun8i-r40-emac 19*4882a593Smuzhiyun - const: allwinner,sun8i-v3s-emac 20*4882a593Smuzhiyun - const: allwinner,sun50i-a64-emac 21*4882a593Smuzhiyun - items: 22*4882a593Smuzhiyun - const: allwinner,sun50i-h6-emac 23*4882a593Smuzhiyun - const: allwinner,sun50i-a64-emac 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun reg: 26*4882a593Smuzhiyun maxItems: 1 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun interrupts: 29*4882a593Smuzhiyun maxItems: 1 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun interrupt-names: 32*4882a593Smuzhiyun const: macirq 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun clocks: 35*4882a593Smuzhiyun maxItems: 1 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun clock-names: 38*4882a593Smuzhiyun const: stmmaceth 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun syscon: 41*4882a593Smuzhiyun $ref: /schemas/types.yaml#definitions/phandle 42*4882a593Smuzhiyun description: 43*4882a593Smuzhiyun Phandle to the device containing the EMAC or GMAC clock 44*4882a593Smuzhiyun register 45*4882a593Smuzhiyun 46*4882a593Smuzhiyunrequired: 47*4882a593Smuzhiyun - compatible 48*4882a593Smuzhiyun - reg 49*4882a593Smuzhiyun - interrupts 50*4882a593Smuzhiyun - interrupt-names 51*4882a593Smuzhiyun - clocks 52*4882a593Smuzhiyun - clock-names 53*4882a593Smuzhiyun - resets 54*4882a593Smuzhiyun - reset-names 55*4882a593Smuzhiyun - phy-handle 56*4882a593Smuzhiyun - phy-mode 57*4882a593Smuzhiyun - syscon 58*4882a593Smuzhiyun 59*4882a593SmuzhiyunallOf: 60*4882a593Smuzhiyun - $ref: "snps,dwmac.yaml#" 61*4882a593Smuzhiyun - if: 62*4882a593Smuzhiyun properties: 63*4882a593Smuzhiyun compatible: 64*4882a593Smuzhiyun contains: 65*4882a593Smuzhiyun enum: 66*4882a593Smuzhiyun - allwinner,sun8i-a83t-emac 67*4882a593Smuzhiyun - allwinner,sun8i-h3-emac 68*4882a593Smuzhiyun - allwinner,sun8i-v3s-emac 69*4882a593Smuzhiyun - allwinner,sun50i-a64-emac 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun then: 72*4882a593Smuzhiyun properties: 73*4882a593Smuzhiyun allwinner,tx-delay-ps: 74*4882a593Smuzhiyun default: 0 75*4882a593Smuzhiyun minimum: 0 76*4882a593Smuzhiyun maximum: 700 77*4882a593Smuzhiyun multipleOf: 100 78*4882a593Smuzhiyun description: 79*4882a593Smuzhiyun External RGMII PHY TX clock delay chain value in ps. 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun allwinner,rx-delay-ps: 82*4882a593Smuzhiyun default: 0 83*4882a593Smuzhiyun minimum: 0 84*4882a593Smuzhiyun maximum: 3100 85*4882a593Smuzhiyun multipleOf: 100 86*4882a593Smuzhiyun description: 87*4882a593Smuzhiyun External RGMII PHY TX clock delay chain value in ps. 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun - if: 90*4882a593Smuzhiyun properties: 91*4882a593Smuzhiyun compatible: 92*4882a593Smuzhiyun contains: 93*4882a593Smuzhiyun enum: 94*4882a593Smuzhiyun - allwinner,sun8i-r40-emac 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun then: 97*4882a593Smuzhiyun properties: 98*4882a593Smuzhiyun allwinner,rx-delay-ps: 99*4882a593Smuzhiyun default: 0 100*4882a593Smuzhiyun minimum: 0 101*4882a593Smuzhiyun maximum: 700 102*4882a593Smuzhiyun multipleOf: 100 103*4882a593Smuzhiyun description: 104*4882a593Smuzhiyun External RGMII PHY TX clock delay chain value in ps. 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun - if: 107*4882a593Smuzhiyun properties: 108*4882a593Smuzhiyun compatible: 109*4882a593Smuzhiyun contains: 110*4882a593Smuzhiyun enum: 111*4882a593Smuzhiyun - allwinner,sun8i-h3-emac 112*4882a593Smuzhiyun - allwinner,sun8i-v3s-emac 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun then: 115*4882a593Smuzhiyun properties: 116*4882a593Smuzhiyun allwinner,leds-active-low: 117*4882a593Smuzhiyun $ref: /schemas/types.yaml#definitions/flag 118*4882a593Smuzhiyun description: 119*4882a593Smuzhiyun EPHY LEDs are active low. 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun mdio-mux: 122*4882a593Smuzhiyun type: object 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun properties: 125*4882a593Smuzhiyun compatible: 126*4882a593Smuzhiyun const: allwinner,sun8i-h3-mdio-mux 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun mdio-parent-bus: 129*4882a593Smuzhiyun $ref: /schemas/types.yaml#definitions/phandle 130*4882a593Smuzhiyun description: 131*4882a593Smuzhiyun Phandle to EMAC MDIO. 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun mdio@1: 134*4882a593Smuzhiyun type: object 135*4882a593Smuzhiyun description: Internal MDIO Bus 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun properties: 138*4882a593Smuzhiyun "#address-cells": 139*4882a593Smuzhiyun const: 1 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun "#size-cells": 142*4882a593Smuzhiyun const: 0 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun compatible: 145*4882a593Smuzhiyun const: allwinner,sun8i-h3-mdio-internal 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun reg: 148*4882a593Smuzhiyun const: 1 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun patternProperties: 151*4882a593Smuzhiyun "^ethernet-phy@[0-9a-f]$": 152*4882a593Smuzhiyun type: object 153*4882a593Smuzhiyun description: 154*4882a593Smuzhiyun Integrated PHY node 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun properties: 157*4882a593Smuzhiyun clocks: 158*4882a593Smuzhiyun maxItems: 1 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun resets: 161*4882a593Smuzhiyun maxItems: 1 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun required: 164*4882a593Smuzhiyun - clocks 165*4882a593Smuzhiyun - resets 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun mdio@2: 169*4882a593Smuzhiyun type: object 170*4882a593Smuzhiyun description: External MDIO Bus (H3 only) 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun properties: 173*4882a593Smuzhiyun "#address-cells": 174*4882a593Smuzhiyun const: 1 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun "#size-cells": 177*4882a593Smuzhiyun const: 0 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun reg: 180*4882a593Smuzhiyun const: 2 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun required: 183*4882a593Smuzhiyun - compatible 184*4882a593Smuzhiyun - mdio-parent-bus 185*4882a593Smuzhiyun - mdio@1 186*4882a593Smuzhiyun 187*4882a593SmuzhiyununevaluatedProperties: false 188*4882a593Smuzhiyun 189*4882a593Smuzhiyunexamples: 190*4882a593Smuzhiyun - | 191*4882a593Smuzhiyun ethernet@1c0b000 { 192*4882a593Smuzhiyun compatible = "allwinner,sun8i-h3-emac"; 193*4882a593Smuzhiyun syscon = <&syscon>; 194*4882a593Smuzhiyun reg = <0x01c0b000 0x104>; 195*4882a593Smuzhiyun interrupts = <0 82 1>; 196*4882a593Smuzhiyun interrupt-names = "macirq"; 197*4882a593Smuzhiyun resets = <&ccu 12>; 198*4882a593Smuzhiyun reset-names = "stmmaceth"; 199*4882a593Smuzhiyun clocks = <&ccu 27>; 200*4882a593Smuzhiyun clock-names = "stmmaceth"; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun phy-handle = <&int_mii_phy>; 203*4882a593Smuzhiyun phy-mode = "mii"; 204*4882a593Smuzhiyun allwinner,leds-active-low; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun mdio1: mdio { 207*4882a593Smuzhiyun #address-cells = <1>; 208*4882a593Smuzhiyun #size-cells = <0>; 209*4882a593Smuzhiyun compatible = "snps,dwmac-mdio"; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun mdio-mux { 213*4882a593Smuzhiyun compatible = "allwinner,sun8i-h3-mdio-mux"; 214*4882a593Smuzhiyun #address-cells = <1>; 215*4882a593Smuzhiyun #size-cells = <0>; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun mdio-parent-bus = <&mdio1>; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun int_mii_phy: mdio@1 { 220*4882a593Smuzhiyun compatible = "allwinner,sun8i-h3-mdio-internal"; 221*4882a593Smuzhiyun reg = <1>; 222*4882a593Smuzhiyun #address-cells = <1>; 223*4882a593Smuzhiyun #size-cells = <0>; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun ethernet-phy@1 { 226*4882a593Smuzhiyun reg = <1>; 227*4882a593Smuzhiyun clocks = <&ccu 67>; 228*4882a593Smuzhiyun resets = <&ccu 39>; 229*4882a593Smuzhiyun phy-is-integrated; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun }; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun mdio@2 { 234*4882a593Smuzhiyun reg = <2>; 235*4882a593Smuzhiyun #address-cells = <1>; 236*4882a593Smuzhiyun #size-cells = <0>; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun - | 242*4882a593Smuzhiyun ethernet@1c0b000 { 243*4882a593Smuzhiyun compatible = "allwinner,sun8i-h3-emac"; 244*4882a593Smuzhiyun syscon = <&syscon>; 245*4882a593Smuzhiyun reg = <0x01c0b000 0x104>; 246*4882a593Smuzhiyun interrupts = <0 82 1>; 247*4882a593Smuzhiyun interrupt-names = "macirq"; 248*4882a593Smuzhiyun resets = <&ccu 12>; 249*4882a593Smuzhiyun reset-names = "stmmaceth"; 250*4882a593Smuzhiyun clocks = <&ccu 27>; 251*4882a593Smuzhiyun clock-names = "stmmaceth"; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun phy-handle = <&ext_rgmii_phy>; 254*4882a593Smuzhiyun phy-mode = "rgmii"; 255*4882a593Smuzhiyun allwinner,leds-active-low; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun mdio2: mdio { 258*4882a593Smuzhiyun #address-cells = <1>; 259*4882a593Smuzhiyun #size-cells = <0>; 260*4882a593Smuzhiyun compatible = "snps,dwmac-mdio"; 261*4882a593Smuzhiyun }; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun mdio-mux { 264*4882a593Smuzhiyun compatible = "allwinner,sun8i-h3-mdio-mux"; 265*4882a593Smuzhiyun #address-cells = <1>; 266*4882a593Smuzhiyun #size-cells = <0>; 267*4882a593Smuzhiyun mdio-parent-bus = <&mdio2>; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun mdio@1 { 270*4882a593Smuzhiyun compatible = "allwinner,sun8i-h3-mdio-internal"; 271*4882a593Smuzhiyun reg = <1>; 272*4882a593Smuzhiyun #address-cells = <1>; 273*4882a593Smuzhiyun #size-cells = <0>; 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun ethernet-phy@1 { 276*4882a593Smuzhiyun reg = <1>; 277*4882a593Smuzhiyun clocks = <&ccu 67>; 278*4882a593Smuzhiyun resets = <&ccu 39>; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun mdio@2 { 283*4882a593Smuzhiyun reg = <2>; 284*4882a593Smuzhiyun #address-cells = <1>; 285*4882a593Smuzhiyun #size-cells = <0>; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun ext_rgmii_phy: ethernet-phy@1 { 288*4882a593Smuzhiyun reg = <1>; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun }; 291*4882a593Smuzhiyun }; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun - | 295*4882a593Smuzhiyun ethernet@1c0b000 { 296*4882a593Smuzhiyun compatible = "allwinner,sun8i-a83t-emac"; 297*4882a593Smuzhiyun syscon = <&syscon>; 298*4882a593Smuzhiyun reg = <0x01c0b000 0x104>; 299*4882a593Smuzhiyun interrupts = <0 82 1>; 300*4882a593Smuzhiyun interrupt-names = "macirq"; 301*4882a593Smuzhiyun resets = <&ccu 13>; 302*4882a593Smuzhiyun reset-names = "stmmaceth"; 303*4882a593Smuzhiyun clocks = <&ccu 27>; 304*4882a593Smuzhiyun clock-names = "stmmaceth"; 305*4882a593Smuzhiyun phy-handle = <&ext_rgmii_phy1>; 306*4882a593Smuzhiyun phy-mode = "rgmii"; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun mdio { 309*4882a593Smuzhiyun compatible = "snps,dwmac-mdio"; 310*4882a593Smuzhiyun #address-cells = <1>; 311*4882a593Smuzhiyun #size-cells = <0>; 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun ext_rgmii_phy1: ethernet-phy@1 { 314*4882a593Smuzhiyun reg = <1>; 315*4882a593Smuzhiyun }; 316*4882a593Smuzhiyun }; 317*4882a593Smuzhiyun }; 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun... 320