1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/net/adi,adin.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Analog Devices ADIN1200/ADIN1300 PHY 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Alexandru Ardelean <alexandru.ardelean@analog.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun Bindings for Analog Devices Industrial Ethernet PHYs 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunallOf: 16*4882a593Smuzhiyun - $ref: ethernet-phy.yaml# 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunproperties: 19*4882a593Smuzhiyun adi,rx-internal-delay-ps: 20*4882a593Smuzhiyun description: | 21*4882a593Smuzhiyun RGMII RX Clock Delay used only when PHY operates in RGMII mode with 22*4882a593Smuzhiyun internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds. 23*4882a593Smuzhiyun enum: [ 1600, 1800, 2000, 2200, 2400 ] 24*4882a593Smuzhiyun default: 2000 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun adi,tx-internal-delay-ps: 27*4882a593Smuzhiyun description: | 28*4882a593Smuzhiyun RGMII TX Clock Delay used only when PHY operates in RGMII mode with 29*4882a593Smuzhiyun internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds. 30*4882a593Smuzhiyun enum: [ 1600, 1800, 2000, 2200, 2400 ] 31*4882a593Smuzhiyun default: 2000 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun adi,fifo-depth-bits: 34*4882a593Smuzhiyun description: | 35*4882a593Smuzhiyun When operating in RMII mode, this option configures the FIFO depth. 36*4882a593Smuzhiyun enum: [ 4, 8, 12, 16, 20, 24 ] 37*4882a593Smuzhiyun default: 8 38*4882a593Smuzhiyun 39*4882a593SmuzhiyununevaluatedProperties: false 40*4882a593Smuzhiyun 41*4882a593Smuzhiyunexamples: 42*4882a593Smuzhiyun - | 43*4882a593Smuzhiyun ethernet { 44*4882a593Smuzhiyun #address-cells = <1>; 45*4882a593Smuzhiyun #size-cells = <0>; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun phy-mode = "rgmii-id"; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun ethernet-phy@0 { 50*4882a593Smuzhiyun reg = <0>; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun adi,rx-internal-delay-ps = <1800>; 53*4882a593Smuzhiyun adi,tx-internal-delay-ps = <2200>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun - | 57*4882a593Smuzhiyun ethernet { 58*4882a593Smuzhiyun #address-cells = <1>; 59*4882a593Smuzhiyun #size-cells = <0>; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun phy-mode = "rmii"; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun ethernet-phy@1 { 64*4882a593Smuzhiyun reg = <1>; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun adi,fifo-depth-bits = <16>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun }; 69