xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mux/mux-controller.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunCommon multiplexer controller bindings
2*4882a593Smuzhiyun======================================
3*4882a593Smuzhiyun
4*4882a593SmuzhiyunA multiplexer (or mux) controller will have one, or several, consumer devices
5*4882a593Smuzhiyunthat uses the mux controller. Thus, a mux controller can possibly control
6*4882a593Smuzhiyunseveral parallel multiplexers. Presumably there will be at least one
7*4882a593Smuzhiyunmultiplexer needed by each consumer, but a single mux controller can of course
8*4882a593Smuzhiyuncontrol several multiplexers for a single consumer.
9*4882a593Smuzhiyun
10*4882a593SmuzhiyunA mux controller provides a number of states to its consumers, and the state
11*4882a593Smuzhiyunspace is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
12*4882a593Smuzhiyun0-7 for an 8-way multiplexer, etc.
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun
15*4882a593SmuzhiyunConsumers
16*4882a593Smuzhiyun---------
17*4882a593Smuzhiyun
18*4882a593SmuzhiyunMux controller consumers should specify a list of mux controllers that they
19*4882a593Smuzhiyunwant to use with a property containing a 'mux-ctrl-list':
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
22*4882a593Smuzhiyun	single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
23*4882a593Smuzhiyun	mux-ctrl-phandle : phandle to mux controller node
24*4882a593Smuzhiyun	mux-ctrl-specifier : array of #mux-control-cells specifying the
25*4882a593Smuzhiyun			     given mux controller (controller specific)
26*4882a593Smuzhiyun
27*4882a593SmuzhiyunMux controller properties should be named "mux-controls". The exact meaning of
28*4882a593Smuzhiyuneach mux controller property must be documented in the device tree binding for
29*4882a593Smuzhiyuneach consumer. An optional property "mux-control-names" may contain a list of
30*4882a593Smuzhiyunstrings to label each of the mux controllers listed in the "mux-controls"
31*4882a593Smuzhiyunproperty.
32*4882a593Smuzhiyun
33*4882a593SmuzhiyunDrivers for devices that use more than a single mux controller can use the
34*4882a593Smuzhiyun"mux-control-names" property to map the name of the requested mux controller
35*4882a593Smuzhiyunto an index into the list given by the "mux-controls" property.
36*4882a593Smuzhiyun
37*4882a593Smuzhiyunmux-ctrl-specifier typically encodes the chip-relative mux controller number.
38*4882a593SmuzhiyunIf the mux controller chip only provides a single mux controller, the
39*4882a593Smuzhiyunmux-ctrl-specifier can typically be left out.
40*4882a593Smuzhiyun
41*4882a593SmuzhiyunExample:
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	/* One consumer of a 2-way mux controller (one GPIO-line) */
44*4882a593Smuzhiyun	mux: mux-controller {
45*4882a593Smuzhiyun		compatible = "gpio-mux";
46*4882a593Smuzhiyun		#mux-control-cells = <0>;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun		mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>;
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	adc-mux {
52*4882a593Smuzhiyun		compatible = "io-channel-mux";
53*4882a593Smuzhiyun		io-channels = <&adc 0>;
54*4882a593Smuzhiyun		io-channel-names = "parent";
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun		mux-controls = <&mux>;
57*4882a593Smuzhiyun		mux-control-names = "adc";
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		channels = "sync", "in";
60*4882a593Smuzhiyun	};
61*4882a593Smuzhiyun
62*4882a593SmuzhiyunNote that in the example above, specifying the "mux-control-names" is redundant
63*4882a593Smuzhiyunbecause there is only one mux controller in the list. However, if the driver
64*4882a593Smuzhiyunfor the consumer node in fact asks for a named mux controller, that name is of
65*4882a593Smuzhiyuncourse still required.
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun	/*
68*4882a593Smuzhiyun	 * Two consumers (one for an ADC line and one for an i2c bus) of
69*4882a593Smuzhiyun	 * parallel 4-way multiplexers controlled by the same two GPIO-lines.
70*4882a593Smuzhiyun	 */
71*4882a593Smuzhiyun	mux: mux-controller {
72*4882a593Smuzhiyun		compatible = "gpio-mux";
73*4882a593Smuzhiyun		#mux-control-cells = <0>;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun		mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
76*4882a593Smuzhiyun			    <&pioA 1 GPIO_ACTIVE_HIGH>;
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun	adc-mux {
80*4882a593Smuzhiyun		compatible = "io-channel-mux";
81*4882a593Smuzhiyun		io-channels = <&adc 0>;
82*4882a593Smuzhiyun		io-channel-names = "parent";
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun		mux-controls = <&mux>;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun		channels = "sync-1", "in", "out", "sync-2";
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun	i2c-mux {
90*4882a593Smuzhiyun		compatible = "i2c-mux";
91*4882a593Smuzhiyun		i2c-parent = <&i2c1>;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun		mux-controls = <&mux>;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun		#address-cells = <1>;
96*4882a593Smuzhiyun		#size-cells = <0>;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun		i2c@0 {
99*4882a593Smuzhiyun			reg = <0>;
100*4882a593Smuzhiyun			#address-cells = <1>;
101*4882a593Smuzhiyun			#size-cells = <0>;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun			ssd1307: oled@3c {
104*4882a593Smuzhiyun				/* ... */
105*4882a593Smuzhiyun			};
106*4882a593Smuzhiyun		};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun		i2c@3 {
109*4882a593Smuzhiyun			reg = <3>;
110*4882a593Smuzhiyun			#address-cells = <1>;
111*4882a593Smuzhiyun			#size-cells = <0>;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun			pca9555: pca9555@20 {
114*4882a593Smuzhiyun				/* ... */
115*4882a593Smuzhiyun			};
116*4882a593Smuzhiyun		};
117*4882a593Smuzhiyun	};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun
120*4882a593SmuzhiyunMux controller nodes
121*4882a593Smuzhiyun--------------------
122*4882a593Smuzhiyun
123*4882a593SmuzhiyunMux controller nodes must specify the number of cells used for the
124*4882a593Smuzhiyunspecifier using the '#mux-control-cells' property.
125*4882a593Smuzhiyun
126*4882a593SmuzhiyunOptionally, mux controller nodes can also specify the state the mux should
127*4882a593Smuzhiyunhave when it is idle. The idle-state property is used for this. If the
128*4882a593Smuzhiyunidle-state is not present, the mux controller is typically left as is when
129*4882a593Smuzhiyunit is idle. For multiplexer chips that expose several mux controllers, the
130*4882a593Smuzhiyunidle-state property is an array with one idle state for each mux controller.
131*4882a593Smuzhiyun
132*4882a593SmuzhiyunThe special value (-1) may be used to indicate that the mux should be left
133*4882a593Smuzhiyunas is when it is idle. This is the default, but can still be useful for
134*4882a593Smuzhiyunmux controller chips with more than one mux controller, particularly when
135*4882a593Smuzhiyunthere is a need to "step past" a mux controller and set some other idle
136*4882a593Smuzhiyunstate for a mux controller with a higher index.
137*4882a593Smuzhiyun
138*4882a593SmuzhiyunSome mux controllers have the ability to disconnect the input/output of the
139*4882a593Smuzhiyunmultiplexer. Using this disconnected high-impedance state as the idle state
140*4882a593Smuzhiyunis indicated with idle state (-2).
141*4882a593Smuzhiyun
142*4882a593SmuzhiyunThese constants are available in
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun      #include <dt-bindings/mux/mux.h>
145*4882a593Smuzhiyun
146*4882a593Smuzhiyunas MUX_IDLE_AS_IS (-1) and MUX_IDLE_DISCONNECT (-2).
147*4882a593Smuzhiyun
148*4882a593SmuzhiyunAn example mux controller node look like this (the adg972a chip is a triple
149*4882a593Smuzhiyun4-way multiplexer):
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun	mux: mux-controller@50 {
152*4882a593Smuzhiyun		compatible = "adi,adg792a";
153*4882a593Smuzhiyun		reg = <0x50>;
154*4882a593Smuzhiyun		#mux-control-cells = <1>;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun		idle-state = <MUX_IDLE_DISCONNECT MUX_IDLE_AS_IS 2>;
157*4882a593Smuzhiyun	};
158