xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mux/gpio-mux.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunGPIO-based multiplexer controller bindings
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunDefine what GPIO pins are used to control a multiplexer. Or several
4*4882a593Smuzhiyunmultiplexers, if the same pins control more than one multiplexer.
5*4882a593Smuzhiyun
6*4882a593SmuzhiyunRequired properties:
7*4882a593Smuzhiyun- compatible : "gpio-mux"
8*4882a593Smuzhiyun- mux-gpios : list of gpios used to control the multiplexer, least
9*4882a593Smuzhiyun	      significant bit first.
10*4882a593Smuzhiyun- #mux-control-cells : <0>
11*4882a593Smuzhiyun* Standard mux-controller bindings as decribed in mux-controller.txt
12*4882a593Smuzhiyun
13*4882a593SmuzhiyunOptional properties:
14*4882a593Smuzhiyun- idle-state : if present, the state the mux will have when idle. The
15*4882a593Smuzhiyun	       special state MUX_IDLE_AS_IS is the default.
16*4882a593Smuzhiyun
17*4882a593SmuzhiyunThe multiplexer state is defined as the number represented by the
18*4882a593Smuzhiyunmultiplexer GPIO pins, where the first pin is the least significant
19*4882a593Smuzhiyunbit. An active pin is a binary 1, an inactive pin is a binary 0.
20*4882a593Smuzhiyun
21*4882a593SmuzhiyunExample:
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	mux: mux-controller {
24*4882a593Smuzhiyun		compatible = "gpio-mux";
25*4882a593Smuzhiyun		#mux-control-cells = <0>;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun		mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
28*4882a593Smuzhiyun			    <&pioA 1 GPIO_ACTIVE_HIGH>;
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	adc-mux {
32*4882a593Smuzhiyun		compatible = "io-channel-mux";
33*4882a593Smuzhiyun		io-channels = <&adc 0>;
34*4882a593Smuzhiyun		io-channel-names = "parent";
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun		mux-controls = <&mux>;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		channels = "sync-1", "in", "out", "sync-2";
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	i2c-mux {
42*4882a593Smuzhiyun		compatible = "i2c-mux";
43*4882a593Smuzhiyun		i2c-parent = <&i2c1>;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun		mux-controls = <&mux>;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun		#address-cells = <1>;
48*4882a593Smuzhiyun		#size-cells = <0>;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun		i2c@0 {
51*4882a593Smuzhiyun			reg = <0>;
52*4882a593Smuzhiyun			#address-cells = <1>;
53*4882a593Smuzhiyun			#size-cells = <0>;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun			ssd1307: oled@3c {
56*4882a593Smuzhiyun				/* ... */
57*4882a593Smuzhiyun			};
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		i2c@3 {
61*4882a593Smuzhiyun			reg = <3>;
62*4882a593Smuzhiyun			#address-cells = <1>;
63*4882a593Smuzhiyun			#size-cells = <0>;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun			pca9555: pca9555@20 {
66*4882a593Smuzhiyun				/* ... */
67*4882a593Smuzhiyun			};
68*4882a593Smuzhiyun		};
69*4882a593Smuzhiyun	};
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