xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun* SPI NOR flash: ST M25Pxx (and similar) serial flash chips
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunRequired properties:
4*4882a593Smuzhiyun- #address-cells, #size-cells : Must be present if the device has sub-nodes
5*4882a593Smuzhiyun  representing partitions.
6*4882a593Smuzhiyun- compatible : May include a device-specific string consisting of the
7*4882a593Smuzhiyun               manufacturer and name of the chip. A list of supported chip
8*4882a593Smuzhiyun               names follows.
9*4882a593Smuzhiyun               Must also include "jedec,spi-nor" for any SPI NOR flash that can
10*4882a593Smuzhiyun               be identified by the JEDEC READ ID opcode (0x9F).
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun               Supported chip names:
13*4882a593Smuzhiyun                 at25df321a
14*4882a593Smuzhiyun                 at25df641
15*4882a593Smuzhiyun                 at26df081a
16*4882a593Smuzhiyun                 mr25h128
17*4882a593Smuzhiyun                 mr25h256
18*4882a593Smuzhiyun                 mr25h10
19*4882a593Smuzhiyun                 mr25h40
20*4882a593Smuzhiyun                 mx25l4005a
21*4882a593Smuzhiyun                 mx25l1606e
22*4882a593Smuzhiyun                 mx25l6405d
23*4882a593Smuzhiyun                 mx25l12805d
24*4882a593Smuzhiyun                 mx25l25635e
25*4882a593Smuzhiyun                 n25q064
26*4882a593Smuzhiyun                 n25q128a11
27*4882a593Smuzhiyun                 n25q128a13
28*4882a593Smuzhiyun                 n25q512a
29*4882a593Smuzhiyun                 s25fl256s1
30*4882a593Smuzhiyun                 s25fl512s
31*4882a593Smuzhiyun                 s25sl12801
32*4882a593Smuzhiyun                 s25fl008k
33*4882a593Smuzhiyun                 s25fl064k
34*4882a593Smuzhiyun                 sst25vf040b
35*4882a593Smuzhiyun                 m25p40
36*4882a593Smuzhiyun                 m25p80
37*4882a593Smuzhiyun                 m25p16
38*4882a593Smuzhiyun                 m25p32
39*4882a593Smuzhiyun                 m25p64
40*4882a593Smuzhiyun                 m25p128
41*4882a593Smuzhiyun                 w25x80
42*4882a593Smuzhiyun                 w25x32
43*4882a593Smuzhiyun                 w25q32
44*4882a593Smuzhiyun                 w25q64
45*4882a593Smuzhiyun                 w25q32dw
46*4882a593Smuzhiyun                 w25q80bl
47*4882a593Smuzhiyun                 w25q128
48*4882a593Smuzhiyun                 w25q256
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun               The following chip names have been used historically to
51*4882a593Smuzhiyun               designate quirky versions of flash chips that do not support the
52*4882a593Smuzhiyun               JEDEC READ ID opcode (0x9F):
53*4882a593Smuzhiyun                 m25p05-nonjedec
54*4882a593Smuzhiyun                 m25p10-nonjedec
55*4882a593Smuzhiyun                 m25p20-nonjedec
56*4882a593Smuzhiyun                 m25p40-nonjedec
57*4882a593Smuzhiyun                 m25p80-nonjedec
58*4882a593Smuzhiyun                 m25p16-nonjedec
59*4882a593Smuzhiyun                 m25p32-nonjedec
60*4882a593Smuzhiyun                 m25p64-nonjedec
61*4882a593Smuzhiyun                 m25p128-nonjedec
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun- reg : Chip-Select number
64*4882a593Smuzhiyun- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
65*4882a593Smuzhiyun
66*4882a593SmuzhiyunOptional properties:
67*4882a593Smuzhiyun- m25p,fast-read : Use the "fast read" opcode to read data from the chip instead
68*4882a593Smuzhiyun                   of the usual "read" opcode. This opcode is not supported by
69*4882a593Smuzhiyun                   all chips and support for it can not be detected at runtime.
70*4882a593Smuzhiyun                   Refer to your chips' datasheet to check if this is supported
71*4882a593Smuzhiyun                   by your chip.
72*4882a593Smuzhiyun- broken-flash-reset : Some flash devices utilize stateful addressing modes
73*4882a593Smuzhiyun		   (e.g., for 32-bit addressing) which need to be managed
74*4882a593Smuzhiyun		   carefully by a system. Because these sorts of flash don't
75*4882a593Smuzhiyun		   have a standardized software reset command, and because some
76*4882a593Smuzhiyun		   systems don't toggle the flash RESET# pin upon system reset
77*4882a593Smuzhiyun		   (if the pin even exists at all), there are systems which
78*4882a593Smuzhiyun		   cannot reboot properly if the flash is left in the "wrong"
79*4882a593Smuzhiyun		   state. This boolean flag can be used on such systems, to
80*4882a593Smuzhiyun		   denote the absence of a reliable reset mechanism.
81*4882a593Smuzhiyun
82*4882a593SmuzhiyunExample:
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun	flash: m25p80@0 {
85*4882a593Smuzhiyun		#address-cells = <1>;
86*4882a593Smuzhiyun		#size-cells = <1>;
87*4882a593Smuzhiyun		compatible = "spansion,m25p80", "jedec,spi-nor";
88*4882a593Smuzhiyun		reg = <0>;
89*4882a593Smuzhiyun		spi-max-frequency = <40000000>;
90*4882a593Smuzhiyun		m25p,fast-read;
91*4882a593Smuzhiyun	};
92