xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/mtd/ingenic,nand.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Ingenic SoCs NAND controller devicetree bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Paul Cercueil <paul@crapouillou.net>
11*4882a593Smuzhiyun
12*4882a593SmuzhiyunallOf:
13*4882a593Smuzhiyun  - $ref: nand-controller.yaml#
14*4882a593Smuzhiyun
15*4882a593Smuzhiyunproperties:
16*4882a593Smuzhiyun  compatible:
17*4882a593Smuzhiyun    enum:
18*4882a593Smuzhiyun      - ingenic,jz4740-nand
19*4882a593Smuzhiyun      - ingenic,jz4725b-nand
20*4882a593Smuzhiyun      - ingenic,jz4780-nand
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun  reg:
23*4882a593Smuzhiyun    items:
24*4882a593Smuzhiyun      - description: Bank number, offset and size of first attached NAND chip
25*4882a593Smuzhiyun      - description: Bank number, offset and size of second attached NAND chip
26*4882a593Smuzhiyun      - description: Bank number, offset and size of third attached NAND chip
27*4882a593Smuzhiyun      - description: Bank number, offset and size of fourth attached NAND chip
28*4882a593Smuzhiyun    minItems: 1
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun  ecc-engine: true
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  partitions:
33*4882a593Smuzhiyun    type: object
34*4882a593Smuzhiyun    description:
35*4882a593Smuzhiyun      Node containing description of fixed partitions.
36*4882a593Smuzhiyun      See Documentation/devicetree/bindings/mtd/partition.txt
37*4882a593Smuzhiyun
38*4882a593SmuzhiyunpatternProperties:
39*4882a593Smuzhiyun  "^nand@[a-f0-9]$":
40*4882a593Smuzhiyun    type: object
41*4882a593Smuzhiyun    properties:
42*4882a593Smuzhiyun      rb-gpios:
43*4882a593Smuzhiyun        description: GPIO specifier for the busy pin.
44*4882a593Smuzhiyun        maxItems: 1
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun      wp-gpios:
47*4882a593Smuzhiyun        description: GPIO specifier for the write-protect pin.
48*4882a593Smuzhiyun        maxItems: 1
49*4882a593Smuzhiyun
50*4882a593Smuzhiyunrequired:
51*4882a593Smuzhiyun  - compatible
52*4882a593Smuzhiyun  - reg
53*4882a593Smuzhiyun
54*4882a593SmuzhiyununevaluatedProperties: false
55*4882a593Smuzhiyun
56*4882a593Smuzhiyunexamples:
57*4882a593Smuzhiyun  - |
58*4882a593Smuzhiyun    #include <dt-bindings/clock/jz4780-cgu.h>
59*4882a593Smuzhiyun    memory-controller@13410000 {
60*4882a593Smuzhiyun      compatible = "ingenic,jz4780-nemc";
61*4882a593Smuzhiyun      reg = <0x13410000 0x10000>;
62*4882a593Smuzhiyun      #address-cells = <2>;
63*4882a593Smuzhiyun      #size-cells = <1>;
64*4882a593Smuzhiyun      ranges = <1 0 0x1b000000 0x1000000>,
65*4882a593Smuzhiyun         <2 0 0x1a000000 0x1000000>,
66*4882a593Smuzhiyun         <3 0 0x19000000 0x1000000>,
67*4882a593Smuzhiyun         <4 0 0x18000000 0x1000000>,
68*4882a593Smuzhiyun         <5 0 0x17000000 0x1000000>,
69*4882a593Smuzhiyun         <6 0 0x16000000 0x1000000>;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun      clocks = <&cgu JZ4780_CLK_NEMC>;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun      nand-controller@1 {
74*4882a593Smuzhiyun        compatible = "ingenic,jz4780-nand";
75*4882a593Smuzhiyun        reg = <1 0 0x1000000>;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun        #address-cells = <1>;
78*4882a593Smuzhiyun        #size-cells = <0>;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun        ecc-engine = <&bch>;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun        ingenic,nemc-tAS = <10>;
83*4882a593Smuzhiyun        ingenic,nemc-tAH = <5>;
84*4882a593Smuzhiyun        ingenic,nemc-tBP = <10>;
85*4882a593Smuzhiyun        ingenic,nemc-tAW = <15>;
86*4882a593Smuzhiyun        ingenic,nemc-tSTRV = <100>;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun        pinctrl-names = "default";
89*4882a593Smuzhiyun        pinctrl-0 = <&pins_nemc>;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun        nand@1 {
92*4882a593Smuzhiyun          reg = <1>;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun          nand-ecc-step-size = <1024>;
95*4882a593Smuzhiyun          nand-ecc-strength = <24>;
96*4882a593Smuzhiyun          nand-ecc-mode = "hw";
97*4882a593Smuzhiyun          nand-on-flash-bbt;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun          pinctrl-names = "default";
100*4882a593Smuzhiyun          pinctrl-0 = <&pins_nemc_cs1>;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun          partitions {
103*4882a593Smuzhiyun            compatible = "fixed-partitions";
104*4882a593Smuzhiyun            #address-cells = <2>;
105*4882a593Smuzhiyun            #size-cells = <2>;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun            partition@0 {
108*4882a593Smuzhiyun              label = "u-boot-spl";
109*4882a593Smuzhiyun              reg = <0x0 0x0 0x0 0x800000>;
110*4882a593Smuzhiyun            };
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun            partition@800000 {
113*4882a593Smuzhiyun              label = "u-boot";
114*4882a593Smuzhiyun              reg = <0x0 0x800000 0x0 0x200000>;
115*4882a593Smuzhiyun            };
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun            partition@a00000 {
118*4882a593Smuzhiyun              label = "u-boot-env";
119*4882a593Smuzhiyun              reg = <0x0 0xa00000 0x0 0x200000>;
120*4882a593Smuzhiyun            };
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun            partition@c00000 {
123*4882a593Smuzhiyun              label = "boot";
124*4882a593Smuzhiyun              reg = <0x0 0xc00000 0x0 0x4000000>;
125*4882a593Smuzhiyun            };
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun            partition@4c00000 {
128*4882a593Smuzhiyun              label = "system";
129*4882a593Smuzhiyun              reg = <0x0 0x4c00000 0x1 0xfb400000>;
130*4882a593Smuzhiyun            };
131*4882a593Smuzhiyun          };
132*4882a593Smuzhiyun        };
133*4882a593Smuzhiyun      };
134*4882a593Smuzhiyun    };
135