1*4882a593Smuzhiyun* TI Highspeed MMC host controller for OMAP and 66AK2G family. 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Highspeed MMC Host Controller on TI OMAP and 66AK2G family 4*4882a593Smuzhiyunprovides an interface for MMC, SD, and SDIO types of memory cards. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunThis file documents differences between the core properties described 7*4882a593Smuzhiyunby mmc.txt and the properties used by the omap_hsmmc driver. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunRequired properties: 10*4882a593Smuzhiyun-------------------- 11*4882a593Smuzhiyun- compatible: 12*4882a593Smuzhiyun Should be "ti,omap2-hsmmc", for OMAP2 controllers 13*4882a593Smuzhiyun Should be "ti,omap3-hsmmc", for OMAP3 controllers 14*4882a593Smuzhiyun Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0 15*4882a593Smuzhiyun Should be "ti,omap4-hsmmc", for OMAP4 controllers 16*4882a593Smuzhiyun Should be "ti,am33xx-hsmmc", for AM335x controllers 17*4882a593Smuzhiyun Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers. 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunSoC specific required properties: 20*4882a593Smuzhiyun--------------------------------- 21*4882a593SmuzhiyunThe following are mandatory properties for OMAPs, AM33xx and AM43xx SoCs only: 22*4882a593Smuzhiyun- ti,hwmods: Must be "mmc<n>", n is controller instance starting 1. 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunThe following are mandatory properties for 66AK2G SoCs only: 25*4882a593Smuzhiyun- power-domains:Should contain a phandle to a PM domain provider node 26*4882a593Smuzhiyun and an args specifier containing the MMC device id 27*4882a593Smuzhiyun value. This property is as per the binding, 28*4882a593Smuzhiyun Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt 29*4882a593Smuzhiyun- clocks: Must contain an entry for each entry in clock-names. Should 30*4882a593Smuzhiyun be defined as per the he appropriate clock bindings consumer 31*4882a593Smuzhiyun usage in Documentation/devicetree/bindings/clock/ti,sci-clk.txt 32*4882a593Smuzhiyun- clock-names: Shall be "fck" for the functional clock, 33*4882a593Smuzhiyun and "mmchsdb_fck" for the debounce clock. 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun 36*4882a593SmuzhiyunOptional properties: 37*4882a593Smuzhiyun-------------------- 38*4882a593Smuzhiyun- ti,dual-volt: boolean, supports dual voltage cards 39*4882a593Smuzhiyun- <supply-name>-supply: phandle to the regulator device tree node 40*4882a593Smuzhiyun "supply-name" examples are "vmmc", 41*4882a593Smuzhiyun "vmmc_aux"(deprecated)/"vqmmc" etc 42*4882a593Smuzhiyun- ti,non-removable: non-removable slot (like eMMC) 43*4882a593Smuzhiyun- ti,needs-special-reset: Requires a special softreset sequence 44*4882a593Smuzhiyun- ti,needs-special-hs-handling: HSMMC IP needs special setting 45*4882a593Smuzhiyun for handling High Speed 46*4882a593Smuzhiyun- dmas: List of DMA specifiers with the controller specific 47*4882a593Smuzhiyun format as described in the generic DMA client 48*4882a593Smuzhiyun binding. A tx and rx specifier is required. 49*4882a593Smuzhiyun- dma-names: List of DMA request names. These strings correspond 50*4882a593Smuzhiyun 1:1 with the DMA specifiers listed in dmas. 51*4882a593Smuzhiyun The string naming is to be "rx" and "tx" for 52*4882a593Smuzhiyun RX and TX DMA requests, respectively. 53*4882a593Smuzhiyun 54*4882a593SmuzhiyunExamples: 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun[hwmod populated DMA resources] 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun mmc1: mmc@4809c000 { 59*4882a593Smuzhiyun compatible = "ti,omap4-hsmmc"; 60*4882a593Smuzhiyun reg = <0x4809c000 0x400>; 61*4882a593Smuzhiyun ti,hwmods = "mmc1"; 62*4882a593Smuzhiyun ti,dual-volt; 63*4882a593Smuzhiyun bus-width = <4>; 64*4882a593Smuzhiyun vmmc-supply = <&vmmc>; /* phandle to regulator node */ 65*4882a593Smuzhiyun ti,non-removable; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun[generic DMA request binding] 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun mmc1: mmc@4809c000 { 71*4882a593Smuzhiyun compatible = "ti,omap4-hsmmc"; 72*4882a593Smuzhiyun reg = <0x4809c000 0x400>; 73*4882a593Smuzhiyun ti,hwmods = "mmc1"; 74*4882a593Smuzhiyun ti,dual-volt; 75*4882a593Smuzhiyun bus-width = <4>; 76*4882a593Smuzhiyun vmmc-supply = <&vmmc>; /* phandle to regulator node */ 77*4882a593Smuzhiyun ti,non-removable; 78*4882a593Smuzhiyun dmas = <&edma 24 79*4882a593Smuzhiyun &edma 25>; 80*4882a593Smuzhiyun dma-names = "tx", "rx"; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun[workaround for missing swakeup on am33xx] 84*4882a593Smuzhiyun 85*4882a593SmuzhiyunThis SOC is missing the swakeup line, it will not detect SDIO irq 86*4882a593Smuzhiyunwhile in suspend. 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun ------ 89*4882a593Smuzhiyun | PRCM | 90*4882a593Smuzhiyun ------ 91*4882a593Smuzhiyun ^ | 92*4882a593Smuzhiyun swakeup | | fclk 93*4882a593Smuzhiyun | v 94*4882a593Smuzhiyun ------ ------- ----- 95*4882a593Smuzhiyun | card | -- CIRQ --> | hsmmc | -- IRQ --> | CPU | 96*4882a593Smuzhiyun ------ ------- ----- 97*4882a593Smuzhiyun 98*4882a593SmuzhiyunIn suspend the fclk is off and the module is disfunctional. Even register reads 99*4882a593Smuzhiyunwill fail. A small logic in the host will request fclk restore, when an 100*4882a593Smuzhiyunexternal event is detected. Once the clock is restored, the host detects the 101*4882a593Smuzhiyunevent normally. Since am33xx doesn't have this line it never wakes from 102*4882a593Smuzhiyunsuspend. 103*4882a593Smuzhiyun 104*4882a593SmuzhiyunThe workaround is to reconfigure the dat1 line as a GPIO upon suspend. To make 105*4882a593Smuzhiyunthis work, we need to set the named pinctrl states "default" and "idle". 106*4882a593SmuzhiyunPrepare idle to remux dat1 as a gpio, and default to remux it back as sdio 107*4882a593Smuzhiyundat1. The MMC driver will then toggle between idle and default state during 108*4882a593Smuzhiyunruntime. 109*4882a593Smuzhiyun 110*4882a593SmuzhiyunIn summary: 111*4882a593Smuzhiyun1. select matching 'compatible' section, see example below. 112*4882a593Smuzhiyun2. specify pinctrl states "default" and "idle", "sleep" is optional. 113*4882a593Smuzhiyun3. specify the gpio irq used for detecting sdio irq in suspend 114*4882a593Smuzhiyun 115*4882a593SmuzhiyunIf configuration is incomplete, a warning message is emitted "falling back to 116*4882a593Smuzhiyunpolling". Also check the "sdio irq mode" in /sys/kernel/debug/mmc0/regs. Mind 117*4882a593Smuzhiyunnot every application needs SDIO irq, e.g. MMC cards. 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun mmc1: mmc@48060100 { 120*4882a593Smuzhiyun compatible = "ti,am33xx-hsmmc"; 121*4882a593Smuzhiyun ... 122*4882a593Smuzhiyun pinctrl-names = "default", "idle", "sleep" 123*4882a593Smuzhiyun pinctrl-0 = <&mmc1_pins>; 124*4882a593Smuzhiyun pinctrl-1 = <&mmc1_idle>; 125*4882a593Smuzhiyun pinctrl-2 = <&mmc1_sleep>; 126*4882a593Smuzhiyun ... 127*4882a593Smuzhiyun interrupts-extended = <&intc 64 &gpio2 28 IRQ_TYPE_LEVEL_LOW>; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun mmc1_idle : pinmux_cirq_pin { 131*4882a593Smuzhiyun pinctrl-single,pins = < 132*4882a593Smuzhiyun 0x0f8 0x3f /* GPIO2_28 */ 133*4882a593Smuzhiyun >; 134*4882a593Smuzhiyun }; 135