1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Synopsys Designware Mobile Storage Host Controller Binding 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunallOf: 10*4882a593Smuzhiyun - $ref: "synopsys-dw-mshc-common.yaml#" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunmaintainers: 13*4882a593Smuzhiyun - Ulf Hansson <ulf.hansson@linaro.org> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun# Everything else is described in the common file 16*4882a593Smuzhiyunproperties: 17*4882a593Smuzhiyun compatible: 18*4882a593Smuzhiyun const: snps,dw-mshc 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun reg: 21*4882a593Smuzhiyun maxItems: 1 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun interrupts: 24*4882a593Smuzhiyun maxItems: 1 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun clocks: 27*4882a593Smuzhiyun minItems: 2 28*4882a593Smuzhiyun maxItems: 2 29*4882a593Smuzhiyun description: 30*4882a593Smuzhiyun Handle to "biu" and "ciu" clocks for the 31*4882a593Smuzhiyun bus interface unit clock and the card interface unit clock. 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun clock-names: 34*4882a593Smuzhiyun items: 35*4882a593Smuzhiyun - const: biu 36*4882a593Smuzhiyun - const: ciu 37*4882a593Smuzhiyun 38*4882a593Smuzhiyunrequired: 39*4882a593Smuzhiyun - compatible 40*4882a593Smuzhiyun - reg 41*4882a593Smuzhiyun - interrupts 42*4882a593Smuzhiyun - clocks 43*4882a593Smuzhiyun - clock-names 44*4882a593Smuzhiyun 45*4882a593SmuzhiyununevaluatedProperties: false 46*4882a593Smuzhiyun 47*4882a593Smuzhiyunexamples: 48*4882a593Smuzhiyun - | 49*4882a593Smuzhiyun mmc@12200000 { 50*4882a593Smuzhiyun compatible = "snps,dw-mshc"; 51*4882a593Smuzhiyun reg = <0x12200000 0x1000>; 52*4882a593Smuzhiyun interrupts = <0 75 0>; 53*4882a593Smuzhiyun clocks = <&clock 351>, <&clock 132>; 54*4882a593Smuzhiyun clock-names = "biu", "ciu"; 55*4882a593Smuzhiyun dmas = <&pdma 12>; 56*4882a593Smuzhiyun dma-names = "rx-tx"; 57*4882a593Smuzhiyun resets = <&rst 20>; 58*4882a593Smuzhiyun reset-names = "reset"; 59*4882a593Smuzhiyun vmmc-supply = <&buck8>; 60*4882a593Smuzhiyun #address-cells = <1>; 61*4882a593Smuzhiyun #size-cells = <0>; 62*4882a593Smuzhiyun broken-cd; 63*4882a593Smuzhiyun bus-width = <8>; 64*4882a593Smuzhiyun cap-mmc-highspeed; 65*4882a593Smuzhiyun cap-sd-highspeed; 66*4882a593Smuzhiyun card-detect-delay = <200>; 67*4882a593Smuzhiyun max-frequency = <200000000>; 68*4882a593Smuzhiyun clock-frequency = <400000000>; 69*4882a593Smuzhiyun data-addr = <0x200>; 70*4882a593Smuzhiyun fifo-depth = <0x80>; 71*4882a593Smuzhiyun fifo-watermark-aligned; 72*4882a593Smuzhiyun }; 73