1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Marvell PXA SDHCI v2/v3 bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Ulf Hansson <ulf.hansson@linaro.org> 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunallOf: 13*4882a593Smuzhiyun - $ref: mmc-controller.yaml# 14*4882a593Smuzhiyun - if: 15*4882a593Smuzhiyun properties: 16*4882a593Smuzhiyun compatible: 17*4882a593Smuzhiyun contains: 18*4882a593Smuzhiyun const: marvell,armada-380-sdhci 19*4882a593Smuzhiyun then: 20*4882a593Smuzhiyun properties: 21*4882a593Smuzhiyun regs: 22*4882a593Smuzhiyun minItems: 3 23*4882a593Smuzhiyun reg-names: 24*4882a593Smuzhiyun minItems: 3 25*4882a593Smuzhiyun required: 26*4882a593Smuzhiyun - reg-names 27*4882a593Smuzhiyun else: 28*4882a593Smuzhiyun properties: 29*4882a593Smuzhiyun regs: 30*4882a593Smuzhiyun maxItems: 1 31*4882a593Smuzhiyun reg-names: 32*4882a593Smuzhiyun maxItems: 1 33*4882a593Smuzhiyun 34*4882a593Smuzhiyunproperties: 35*4882a593Smuzhiyun compatible: 36*4882a593Smuzhiyun enum: 37*4882a593Smuzhiyun - mrvl,pxav2-mmc 38*4882a593Smuzhiyun - mrvl,pxav3-mmc 39*4882a593Smuzhiyun - marvell,armada-380-sdhci 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun reg: 42*4882a593Smuzhiyun minItems: 1 43*4882a593Smuzhiyun maxItems: 3 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun reg-names: 46*4882a593Smuzhiyun items: 47*4882a593Smuzhiyun - const: sdhci 48*4882a593Smuzhiyun - const: mbus 49*4882a593Smuzhiyun - const: conf-sdio3 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun interrupts: 52*4882a593Smuzhiyun maxItems: 1 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun clocks: 55*4882a593Smuzhiyun minItems: 1 56*4882a593Smuzhiyun maxItems: 2 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun clock-names: 59*4882a593Smuzhiyun minItems: 1 60*4882a593Smuzhiyun maxItems: 2 61*4882a593Smuzhiyun items: 62*4882a593Smuzhiyun - const: io 63*4882a593Smuzhiyun - const: core 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun mrvl,clk-delay-cycles: 66*4882a593Smuzhiyun description: Specify a number of cycles to delay for tuning. 67*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32 68*4882a593Smuzhiyun 69*4882a593Smuzhiyunrequired: 70*4882a593Smuzhiyun - compatible 71*4882a593Smuzhiyun - reg 72*4882a593Smuzhiyun - interrupts 73*4882a593Smuzhiyun - clocks 74*4882a593Smuzhiyun - clock-names 75*4882a593Smuzhiyun 76*4882a593SmuzhiyununevaluatedProperties: false 77*4882a593Smuzhiyun 78*4882a593Smuzhiyunexamples: 79*4882a593Smuzhiyun - | 80*4882a593Smuzhiyun #include <dt-bindings/clock/berlin2.h> 81*4882a593Smuzhiyun mmc@d4280800 { 82*4882a593Smuzhiyun compatible = "mrvl,pxav3-mmc"; 83*4882a593Smuzhiyun reg = <0xd4280800 0x800>; 84*4882a593Smuzhiyun bus-width = <8>; 85*4882a593Smuzhiyun interrupts = <27>; 86*4882a593Smuzhiyun clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>; 87*4882a593Smuzhiyun clock-names = "io", "core"; 88*4882a593Smuzhiyun non-removable; 89*4882a593Smuzhiyun mrvl,clk-delay-cycles = <31>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun - | 92*4882a593Smuzhiyun mmc@d8000 { 93*4882a593Smuzhiyun compatible = "marvell,armada-380-sdhci"; 94*4882a593Smuzhiyun reg-names = "sdhci", "mbus", "conf-sdio3"; 95*4882a593Smuzhiyun reg = <0xd8000 0x1000>, 96*4882a593Smuzhiyun <0xdc000 0x100>, 97*4882a593Smuzhiyun <0x18454 0x4>; 98*4882a593Smuzhiyun interrupts = <0 25 0x4>; 99*4882a593Smuzhiyun clocks = <&gateclk 17>; 100*4882a593Smuzhiyun clock-names = "io"; 101*4882a593Smuzhiyun mrvl,clk-delay-cycles = <0x1F>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun... 105