1*4882a593Smuzhiyun* Synopsys DesignWare Cores Mobile Storage Host Controller 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: should be one of the following: 5*4882a593Smuzhiyun "snps,dwcmshc-sdhci" 6*4882a593Smuzhiyun- reg: offset and length of the register set for the device. 7*4882a593Smuzhiyun- interrupts: a single interrupt specifier. 8*4882a593Smuzhiyun- clocks: Array of clocks required for SDHCI; requires at least one for 9*4882a593Smuzhiyun core clock. 10*4882a593Smuzhiyun- clock-names: Array of names corresponding to clocks property; shall be 11*4882a593Smuzhiyun "core" for core clock and "bus" for optional bus clock. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunExample: 14*4882a593Smuzhiyun sdhci2: sdhci@aa0000 { 15*4882a593Smuzhiyun compatible = "snps,dwcmshc-sdhci"; 16*4882a593Smuzhiyun reg = <0xaa0000 0x1000>; 17*4882a593Smuzhiyun interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 18*4882a593Smuzhiyun clocks = <&emmcclk>; 19*4882a593Smuzhiyun bus-width = <8>; 20*4882a593Smuzhiyun } 21